62
Bit 7 This bit is 1 whenever the memory is enabled for writing new frames. This includes
any time the memory mode is programmed for direct or FIFO, and in circular buffer mode
from the time memory is reset (Z command) until all post-trigger frames have been written
to memory. Use this as the busy bit in circular buffer mode.
Bit 6 This bit is 1 if a trigger event has been received since memory reset.
Bit 5 This bit is 1 if the current 300KB USB frame contains a start of frame.
Bit 4 This bit is 1 if the entire memory has filled since the last memory reset. In circular
buffer mode this indicates a “wrap” condition. When this bit is set, the oldest frame in
memory can be found by scanning forward from the most recent frame. If the bit is not set,
the oldest frame will start at memory address zero.
Bits 3:0 These bits show the current state of the Memory Options register.
C
ONFIGURATION
M
EMORY
C
HANGES
The follow configuration for memory locations where added:
Byte Offset
(decimal)
Bytes Description
63
1
Memory Mode
128
2
Post-Trigger frame count (0 to 65535)
130
1
Debug Byte (for scoping internal
signals)
131
1
Readback_count (1 to 255)
132
2
Vertical Blanking for USB “frame” (2 to
3613)
The Memory Mode is a bit field in which
Bits 2-0
define the recording mode (circular buffer is mode 2)
Bit 3
1=preview the latest frame 0=don't preview