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Espressif Systems ESP8684 Series Скачать руководство пользователя страница 17

3

PCB Layout Design

Max 1

Base board

Max 2

Min15

5.4

Unit: mm

: Clearance Area

Figure 11: Keepout Zone for ESP8684 Module’s Antenna on the Base Board

If the product is designed with a layout that does not meet the above rules, it is necessary to test the throughput

and communication signal range of the whole product to ensure product performance. When designing an end

product, attention should be paid to the interference caused by the housing of the antenna and it is

recommended to carry out RF verification.

3.3 Power Supply

Figure 12: ESP8684 Power Traces in a Fourlayer PCB Design

• Four-layer PCB design is recommended over a two-layer design. The power traces should be routed on

Layer 3 whenever possible. Vias are required for the power traces to go through the layers and get

Espressif Systems

17

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ESP8684 Series Hardware Design Guidelines v1.1

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Содержание ESP8684 Series

Страница 1: ...te ESP8684 into other products ESP8684 is a series of ultra low power Wi Fi and Bluetooth 5 LE SoCs These guidelines will help to ensure optimal performance of your product with respect to tech nical...

Страница 2: ...pply 17 3 4 Crystal Oscillator 18 3 5 RF 19 3 6 UART 21 3 7 Typical Layout Problems and Solutions 21 3 7 1 Q The current ripple is not large but the TX performance of RF is rather poor 21 3 7 2 Q The...

Страница 3: ...Contents Revision History 27 Espressif Systems 3 Submit Documentation Feedback ESP8684 Series Hardware Design Guidelines v1 1...

Страница 4: ...matic for the Oscillator 10 7 Schematic for RF Matching 11 8 Setup and Hold Times for the Strapping Pins 12 9 ESP8684 PCB Layout 15 10 Placement of ESP8684 Modules on Base Board 16 11 Keepout Zone for...

Страница 5: ...hout the need for a host MCU ESP8684 series provides a highly integrated way to implement Wi Fi and Bluetooth LE technologies using a complete RF subsystem including a antenna switch RF balun power am...

Страница 6: ...ND GND GND GND GND VDD33 G Title Size Date A4 Title Size Date A4 Title Size Date A4 C1 TBD R1 0 1 R2 499 1 Y1 40MHz XIN 1 GND 2 XOUT 3 GND 4 L1 2 0nH 0 1nH C9 TBD U2 ANT 1 VDDA3P3 2 VDDA3P3 3 GPIO0 4...

Страница 7: ...0TXD 20 XTAL_N 22 XTAL_P 23 GND 25 GPIO3 8 VDDA 24 VDDA 21 GPIO18 18 C10 VDD33 C12 0 1uF 6 3V 10 0 1uF 6 3V 10 Figure 2 Schematic for the Digital Power Supply Pins 2 1 2 Analog Power Supply Pin 2 and...

Страница 8: ...Sequence and System Reset 2 2 1 Power on Sequence ESP8684 uses a 3 3 V system power supply The chip should be activated after the power rails have stabilized This is achieved by delaying the activatio...

Страница 9: ...ation of CHIP_EN signal level VIL_nRST to reset the chip 50 2 3 Flash ESP8684 series is embedded with 1 MB 2 MB or 4 MB flash It doesn t need to connect to external flash for firmware 2 4 Clock Source...

Страница 10: ...tible with the crystal In case of defects in the circuit design you can still use the crystal The circuit for the oscillator is shown in Figure 6 5 4 3 NC No component The values of C8 L2 and C9 vary...

Страница 11: ...g Pins Note The content below is excerpted from Section Strapping Pins in ESP8684 Series Datasheet ESP8684 series has two strapping pins GPIO8 GPIO9 Software can read the values of GPIO8 and GPIO9 fro...

Страница 12: ...led and not controlled by GPIO8 1 The strapping combination of GPIO8 0 and GPIO9 0 is invalid and will trigger unexpected be havior Figure 8 shows the setup and hold times for the strapping pins befor...

Страница 13: ...her they provide highly configurable I O Using GPIO Matrix peripheral input signals can be configured from any IO pins while peripheral output signals can be configured to any IO pins Table 4 shows th...

Страница 14: ...ance state IE 1 We recommend pulling high or low GPIO pins in high impedance state to avoid unnecessary power consumption You may add pull up and pull down resistors in your PCB design referring to Ta...

Страница 15: ...place any components on this layer It is acceptable to route signal traces on this layer when GND plane is applied A two layer PCB design can also be used Layer 1 TOP Signal traces and components Laye...

Страница 16: ...ark are not recommended 1 2 3 4 5 Base board Feed Point Figure 10 Placement of ESP8684 Modules on Base Board If the positions recommended are not feasible please make sure that the module is not cover...

Страница 17: ...mance When designing an end product attention should be paid to the interference caused by the housing of the antenna and it is recommended to carry out RF verification 3 3 Power Supply Figure 12 ESP8...

Страница 18: ...o ensure a short return path As shown in Figure 13 it is recommended to connect the capacitor to ground in the LC filter circuit near VDD3P3 pins to the fourth layer through a via and maintain a keep...

Страница 19: ...crystal oscillator It is best not to route any signal trace under the crystal oscillator The vias on the power traces on both sides of the crystal clock trace should be placed as far away from the cl...

Страница 20: ...ranch out It should be as short as possible with dense ground vias around for inteference shielding The RF trace should be routed on the outer layer without vias i e should not cross layers The RF tra...

Страница 21: ...ible surrounded by ground copper and ground vias 3 7 Typical Layout Problems and Solutions 3 7 1 Q The current ripple is not large but the TX performance of RF is rather poor Analysis The current ripp...

Страница 22: ...tion caused by the impedance mismatch on the transmission line connecting the RF pin and the antenna Besides the impedance mismatch will affect the working state of the internal PA making the PA prema...

Страница 23: ...downloaded in the flash If you need to download different firmware please follow the steps below 1 Set the module to UART Download mode by pulling IO9 pulled up by default low and IO8 high 2 Power on...

Страница 24: ...delines please refer to the checklist in Espressif Hardware Examination Form https www espressif com en contact us technical inquiries hardware issues In case of doubt or discrepancy between this docu...

Страница 25: ...Notes from Espressif folks https blog espressif com See the tabs SDKs and Demos Apps Tools AT Firmware https espressif com en support download sdks demos Products ESP8684 Series SoCs Browse through al...

Страница 26: ...Amplifier RC Resistor Capacitor RTC Real Time Clock RX Receive SiP System in Package TX Transmit Zero ohm resistor A zero ohm resistor is a placeholder on the circuit so that another higher ohm resist...

Страница 27: ...istory Date Version Release Notes 2022 05 20 v1 1 Added section RTC optional 2022 05 05 v1 0 First release 2022 01 10 v0 1 Draft Espressif Systems 27 Submit Documentation Feedback ESP8684 Series Hardw...

Страница 28: ...OPOSAL SPECIFICATION OR SAMPLE All liability including liability for infringement of any proprietary rights relating to use of information in this document is disclaimed No licenses express or implied...

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