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Espressif Systems
ESP8266EX
Hardware User Guide
Figure 13 Planning Framework of Layout Plane Position
The digital signals between CPU and DDR produces high frequency noise and will interference WiFi
frequency in the air. Therefore, the following points should be noted in system designs:
•
As shown in Fig.4, ESP8266EX is on the edge of PCB and far away from CPU and DDR(the
noise source CPU+DDR). The increase in distance will decrease the interference distance and
would reduce the coupling noise;
•
When ESP8266EX communicates with CPU via SDIO, it would be optimal if the six signal lines
are connected through a 200
Ω
series resistor. The purpose is to reduce the drive current and
the corresponding interference and at sthe same time sequence problems due to the
inconsistent length of SDIO lines.
•
PCB onboard antenna should not be selected as it receive relatively large interferences and is
vulnerable to the coupling noise that might affect RF performance. External antenna should be
applied that can be directed away from the PCB board so that the influence of interference
signals of high frequency on WiFi will be reduced.
•
During layout, the high frequency signal line control between CPU and MEM should be noted.
The line layout should comply firmly with high frequency signal regulations (refer to DDR line
control documents) where CLK should be lined underground, data lines and addr lines should
be packed and lined underground.
•
The GND of WiFi circuit and other high power devices should be separated and connected
through wires if there are electric machines in system design.
•
Antenna should keep away from noise source of high frequency, such as LCD, HDMI, Camera
Sensor, USB and other high frequency signals.
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Jun 1, 2015
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