!
2. PCB Layout Design
!
Figure 2-9. Reference Placement for Chip Components
2.3. Power Traces, Ground Traces, and Signal Traces
2.3.1. Power Traces Routing
The width of power traces and vias (holes) through layers should meet the requirements of
current flowing:
•
Traces of 1 mm wide should be able to carry the current of up to 1 A.
•
A 0.25 mm via on a 0.5 mm pad should be able to carry the current of up to 500 mA.
•
If copper foil is laid, please make sure that the width of each power trace is constant
along their length, with no bottlenecks due to other traces or vias.
Espressif
!
/19
14
2019.01
