Ericsson KPC-300, Руководство по обслуживанию

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Rf Power Control
The DC voltage detected by the directional coupler Z201
is supplied to comparator U202 where it is compared with
the power reference voltage PWR_REF. This comparison
voltage controls the bias voltage to the PA module by drive
transistor Q202, and the output power is stabilized by the
auto power control circuitry. PWR_REF is provided by the
central processing unit (CPU) from information pro-
grammed into the EEPROM. The PWR_REF voltage con-
sists of six reference voltages: low frequency, middle
frequency and high frequency band in both the high and low
power modes. This power control provides the flatness of the
RF output under varied temperature, voltage supply and
frequency bandwidth conditions.
RECEIVER
The receiver has a dual conversion circuitry consisting of
a receiver front end, RF amplifier Q101, 1st mixer Q102, 1st
IF 45 MHz Monolithic Crystal Filter (MCF) Z102, IF ampli-
fier/limiter/discriminator U101, 2nd IF 455 kHz ceramic
filters Z107, Z104, Z105 and ceramic discriminator Z106.
Receiver IF selectivity for 25 or 12.5 kHz channel spacing is
determined by selecting the 455 kHz ceramic filter Z104 for
25 kHz spacing or Z105 for 12.5 kHz spacing.
The demodulated receive audio at the AF OUT port of
U101 is adjusted by Q104, R113 and R114 to produce a
constant demodulated audio level input into the Audio
Speech Processor (ASP) regardless of the receiver channel
spacing mode, 12.5 or 25 kHz. The receive audio gain con-
trolled by Q104, R113 and R114 is increased by 6 dB when
the receiver is switched from 25 kHz to 12.5 kHz channel
spacing. Received audio signals and beep tones are amplified
by audio frequency power amplifier U407 to achieve the
rated 0.5 W audio output power to speaker SP1.
Short circuit protection for U407 consists of U416 and
Q416. When AF PA AMP outputs, SP+ and SP-, are shorted
together or shorted to ground, an excessive current will be
sourced through transistor Q407 which is the pass transistor
that provides bias to U407. This voltage drop across pass
transistor Q407 will be compared in differential amplifier
U416 and fed to voltage level translator Q416 which sends
the excessive current status state information to the CPU. The
CPU then sends a signal to Q407, turning it off and removing
bias from U407. The software in the CPU assumes the short
circuit is an intermittent short and resets for the excessive
current state approximately six (6) seconds later. If the ex-
cessive current state still exists, the CPU again turns Q407
off. After five retries, the CPU assumes the short circuit is
not intermittent and keeps Q407 turned off. The short circuit
condition must be removed before the radio is turned off and
then back on to reset the CPU.
Receiver Front End And Mixer
The receive signal is fed from the antenna to a bandpass
filter, a RF amplifier and an additional bandpass filter to
remove the 1st IF image (F
rx
+90 MHz) and 1st IF/2 (+22.5
MHz) and other out-of-band spurious responses. Total gain
is approximately 8 dB with the first IF image rejection more
than 78 dB.
To achieve the required RF bandpass filtering charac-
teristics across the frequency band, the first front end filter
is electronically turned by changes in the BAND_SW volt-
age which is fed to varactor diode D104. This voltage is
generated by the D/A converter U421 from the CPU input.
The frequency band is divided into three sub-split bands, one
at the low end, one in the middle and one at the upper end of
the band. The CPU determines which sub-split the desired
receive frequency is in and provides the appropriate digital
input to U421 to generate the correct BAND_SW signal for
RF passband tuning.
The receive signal is applied to dual gate GaAsFET mixer
Q102 and mixed with the 0 dBm local oscillator injection
from the synthesizer section to produce the 45 MHz first IF
signal.
45 Hhz Filter
The mixer output is connected to the matching circuit and
provided to the four pole 45 MHz MCF Z102. The 45 MHz
crystal filter reduces the second IF image response (F
rx
-910
kHz) to meet spurious response specification. The output of
Z102 is applied to the 2nd mixer in the IF IC U101 through
the matching circuitry.
U101 consists of the second mixer, two IF amplifi-
ers/limiters, a quadrature detector and a noise filter amplifier.
The second mixer downconverts the first IF 45 MHz signal
to the second IF frequency of 455 kHz. Crystal resonator
Y101 and associated components provide a 44.545 MHz
second IF local oscillator signal. Y101 operated in the third
overtone mode.
The second mixer output is applied to the 455 kHz ce-
ramic filter Z107 and then to the first IF amplifier/limiter.
The first IF amplifier/limiter output is provide to either 455
kHz ceramic filter Z104 (for 25 kHz channel space mode) or
Z105 (for 12.5 kHz channel space mode). These filters are
switched by analog switches U102, U103, U107 and U108
depending on the desired channel spacing mode. Ceramic
discriminator Z106 and internal quadrature detector provide
the demodulated audio output signal at AF OUT. The de-
modulated audio signal, filtered with an internal low pass
filter (fc
≅
47 kHz) is then routed to the baseband audio signal
processor U401 and a noise squelch circuit.
The noise squelch circuit consists of slow and fast squelch
time constants and an additional high pass filter (fc
≅
4.0
kHz). The slow squelch time constant is around 70 ms and is
provided to U404-2. The fast squelch time constant is around
8 ms and is provided to U404-3. During scanning mode, only
the fast squelch is monitored by the CPU. In all other modes,
the slow squelch is monitored.
AE/LZB 119 1874 R1A
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