When the VCO is not on the correct frequency, the synthe-
sizer sends a logic low signal to U13. This causes U13 to cutoff
Q6 which turns on the FAULT LED (CR1). U13 also sends a
logic low signal to the controller, on the FLAG 2 line, indicat-
ing the VCO’s frequency is incorrect.
VOLTAGE REGULATORS
Voltage regulators U15 and U16 reduce the +13.8 VF line
to +5 Vdc and +8 Vdc respectively. The output from U15
(+5V_SYN) is used by both the synthesizer and logic circuitry
while the 8 Vdc output from U16 is used for the op-amps, level
shifters, and the di8V OSC regulator circuit.
The di8V OSC regulator circuit is a linear regulator
consisting of U9A, Q7, Q8, and associated circuitry. The error
amplifier U9A controls Q7 and pass element Q8. The +8V OSC
is used as the power source for the VCO circuit, where addi-
tional filtering is provided to keep noise to a minimum
MAINTENANCE
RECOMMENDED TEST EQUIPMENT
The following test equipment is required to test the Synthe-
sizer Module:
1.
Modulation Analyzer; HP 8901A, or equivalent
2.
Power Supply; 12.0 Vdc @ 500 mA
3.
Frequency Counter; 10 MHz - 250 MHz
4.
Power Meter; -20 dBm to +10 dBm
5.
Spectrum Analyzer, 0 - 1 GHz
TEST AND ALIGNMENT
INITIALIZATION
Apply +12 Vdc to the test fixture.
Current Consumption
Measure the current through pins 15A, 15B, 15C, 16A,
16B, AND 16C.
Verify the current is less than 250 mA. Total current
is the +13.8 VF current and +12 Vdc current com-
bined.
Reference Oscillator
Adjust Y1 for an output frequency of 12.8 MHz
±
2 Hz.
Measure the output power of the reference oscillator output
(J3).
Verify the output power is 1 dBm
±
2 dBm.
Oscillator Alignment
Ground the ENABLE TEST line (pin 22A). Apply +4
Vdc to the V_TUNE line (pin 26A). Measure the frequency
of the free running multiplied oscillator at the LO OUT port
(J2).
Adjust the trimmer capacitor C52 for 445 MHz
(G3), 470 MHz (G7), 420 MHz (G8), 490 MHz
(G10), 420 MHz (G12) or desired injection fre-
quency
±
100 kHz.
Synthesizer Loading
Unground the ENABLE TEST line (pin 22A). Load the
synthesizer IC for 445 MHz (G3) or 470 MHz (G7) or 420
MHz (G8), 490 MHz (G10), 420 MHz (G12) or desired
injection frequency.
Verify the lock indicator (CR1) is off or the FLAG
2 line is high.
Hum and Noise
Initialize the HP 8901A for 300 Hz - 3 kHz, 750
µ
sec
de-emphasis, average FM deviation, and 0.44 dB reference
for the deviation.
Verify the hum and noise (J2) is less than -55 dB.
Output Power and Harmonic Content
Adjust both slugs on FL1 for maximum output level
measured at J2.
Verify the output power (J2) at the fundamental fre-
quency is:
2 dBm
±
2 dB
Verify the harmonic content is less than -30 dBc.
The following service information applies when aligning,
testing, or troubleshooting the RX Synthesizer:
•
Logic Levels:
Logic 1 = high = 4.5 to 5.5 Vdc
Logic 0 = Low = 0 to 0.5 Vdc
•
Receiver Synthesizer Address = A0 A1 A2 = 010
•
Synthesizer data input stream is as follows:
14-bit "R" divider most significant bit (MSB) = R13
through "R" divider least significant (LSB) = R0
10-bit "N" divider MSB = N9 through "N" divider
LSB = N0
7-bit "A" divider MSB = A6 through "A" divider
LSB = A0
Single high Control bit (last bit)
Latched When Control Bit = 1
DATA ENTRY FORMAT
Latched When
Control Bit = 1
Last
Bit
A0
LSB
- - -
A6
MSB
N0
MSB
- -
N0
MSB
R0
LSB
- - -
R13
MSB
Control Bit
•
Synthesizer lock is indicted by the extinguishing of the
front panel LED indicator and a logic high on the fault
FLAG 2 line (J1 pin 12C).
•
Always verify synthesizer lock after each new data
loading.
SERVICE NOTES
Data in
→
Shift
→
Register
Out
LBI-38672J
3
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