2.3.2.7 DRAM Refresh Controller
The CPU is equipped with a refresh controller in its internal controller. This CPU controller can contact the
16-bit length IC5 DRAM, which is a 2 CAS type. The following table lists the junction method between the
H8 CPU and the 2 CAS DRAM.
Table 2-10. Junction Method (CPU - 2 CAS DRAM)
CPU
2 CAS DRAM
HWR
UCAS
LWR
LCAS
CS3
RAS
RD
WR
This method of the DRAM refresh is only used for the CAS-before-RAS cycle method. The following figure
shows the timing of each cycle.
U C A S
L C A S
R A S
W R
A S
(Read / Write Cycle)
Write Cycle
Read Cycle
U C A S
L C A S
R A S
W R
A S
(Refresh Cycle)
Figure 2-27. Junction Method (CPU - DRAM)
Stylus Pro Service Manual
Operating Principles
Rev.A
2-21
Содержание Stylus pro 7700m
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