Epson STYLUS COLOR 480, Руководство по обслуживанию

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EPSON Stylus COLOR 480 Revision B
Operating Principles Electrical Circuit Operating Principles 49
2.2.2.5 Reset Circuit
Reset circuits consist of the rest IC (IC6). Reset circuits are mounted on the MAIN
board to monitor the two voltages: +5V for the logic line and +42V for the drive line.
When each circuit detects abnormality on the corresponding line, it outputs a reset
signal to reset CPU (IC1). This function is necessary to prevent the printer from
operating abnormally. This IC monitors both +5V and +45 lines but can reset them
independently. The reset circuits outputs reset signal when +5V line becomes 4.2V or
lower or +42V line becomes 33.2V or lower.
Unlike the previous products, the timer IC is not built in the reset IC and the Lithium
battery also is not equipped on the main board.
.
Figure 2-22. Reset Circuit Block Diagram
Main signal lines are explained below;
n
OUT1: Interrupt signal
n
OUT2: Reset line
n
IN: +42V line monitoring line
n
VCC: +5V line monitoring line
2.2.2.6 EEPROM Control Circuit
Since EEPROM is nonvolatile memory, it keeps written information if the printer
power is turned off. When the printer is turned ON, CPU (IC1) reads data from
EEPROM (IC5) and when the power is turned OFF it stores data to EEPROM.
Information stored in EEPROM is listed below.
n
Various ink counter (I/C consumption counter, waste pad counter, etc.)
n
Mechanical setting value (Head ID, Bi-D adjustment, USB ID, etc.)
See Table 7-7, “EEPROM Address Map,” on page 131 that provides detailed
information on the values stored in EEPROM.
Figure 2-23. EEPROM Circuit Diagram
EEPROM is connected to CPU with 4 lines and each line has the following function.
n
CS: Chip selection signal
n
CK: Data synchronism clock pulse
n
DI: Data writing line (serial data) at power off.
n
DO: Data reading line (serial data) at power on.
N C 1
I N
N C 2
G N D
I C 6
L A 5 6 2 3 M - T E - L
I C 1
E 0 1 A 1 4 N A
M R E S
V C C
O U T 1
O U T 2
P 8 5
N M I
X R E S E T
1 2 8
1 2 9
1 3 0
8
7
6
5
+ 4 2 V
+ 5 V
1
2
3
4
+ 5 V
8
5
V C C
G N D
N C
1 3 5
1 3 4
1 3 3
1 3 2
1
2
3
4
C S
S K
D I
D O
E C S
E C K
E D I
E D O
A T 9 3 C 4 6
( I C 5 )
E 0 1 A 1 4 N A
( I C 1 )
O R G
7
6