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5. FUNCTIONAL DESCRIPTION

10

EPSON

S1F76540M0C Series Technical Manual

(Rev.1.1)

5.6 Soft Start Circuit

The soft start circuit is used to minimize the peak value of the rush current at startup of the booster.
As shown in Figure 5.5, the maximum 200 ms (100mSec Typ.) after the input voltage VI has been input is set as
the soft start period. During the soft start period, the VO output may not reach the electric potential that was
boosted sufficiently.
In this case, the electric potential of the VO output is boosted smoothly up to the specified voltage after the soft
start period has been expired.

Figure 5.5 Soft start operation

[Notes on connecting the capacitor for stabilizing the input voltage]
To stabilize the input voltage VI, the capacitor (CI) to be connected between the V

DD

and VI pins must be

placed near the IC pin so that the wiring is as short as possible.

Soft start time
Typ. 100mSec

Max. 200mSec

Input voltage VI

Booster voltage VO

Stabilization output

V

REG

Regulator VI

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Содержание S1F76540M0C Series

Страница 1: ...Rev 1 1 S1F76540M0C Series Technical Manual ...

Страница 2: ...Moreover no license to any intellectual property rights is granted by implication or otherwise and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Ex...

Страница 3: ...ERISTICS MEASUREMENT STANDARD 12 7 1 DC Characteristics 12 7 2 AC Characteristics 14 8 CHARACTERISTICS GRAPHS 15 9 REFERENCE EXTERNAL CONNECTION EXAMPLES 19 9 1 Quadruple Boosting Regulator 19 9 2 3rd Boosting Regulator 20 9 3 Double Boosting Regulator 21 9 4 Quadruple Boosting 22 9 5 3rd Boosting 23 9 6 Double Boosting 24 9 7 Parallel Connection Boosting Capacity Increase 25 9 8 High Magnificatio...

Страница 4: ... current for system suspension It is therefore appropriate for battery driven portable devices 1 2 Features Charge pump type DC DC converter negatively quadruple triple or double Built in voltage regulator voltage stabilization output circuit High level conversion efficiency 96 VI 5V Typ Low consumption current 100mA VI 5V At quadruple boosting Typ High output capability 20mA Max Input voltage ran...

Страница 5: ... 1 Pin assignment 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VO VRI VREG RV VDD FC TC1 TC2 C2P C2N C3N C1N C1P VI POFF1X POFF2X POFF1X POFF2X TC1 TC2 RV VREG VRI VO VDD Power off control circuit Clock generator Voltage converter Boost control circuit Voltage stabilizer Reference voltage circuit FC VI C1P C1N C3N C2P C2N Soft start circuit ...

Страница 6: ...l or parallel connection Two way pin TC1 7 Input pin for specifying the regulator output temperature gradient 1 TC2 8 Input pin for specifying the regulator output temperature gradient 2 POFF2X 9 Power off control input pin 2 POFF1X 10 Power off control input pin 1 VI 11 Power supply voltage C1P 12 Positive connect pin for double and quadruple boosting capacitor C1N 13 Negative connect pin for dou...

Страница 7: ...tors for boosting Table 5 1 FC pin settings Selection judgment characteristics FC pin Mode name Clock frequency Consumption current Output ripple Output impedance Capacitor capacity H VDD Low output 4 0kHz Typ IOP Note 1 VRP Note 2 See Figure 5 1 See Figure 5 1 L VI High output 16 0kHz Typ IOP Note 1 VRP Note 2 See Figure 5 1 See Figure 5 1 Note 1 For the consumption current value see 7 1 DC Chara...

Страница 8: ... simultaneously with for the quadruple boosting Figure 5 2 shows the potential relations at quadruple 3rd or double boosting In the parallel connection the C2P pin is used as a clock output pin in the master side see Figure 9 8 Figure 5 2 Boosting potential relation diagram At VI 5V Notes on connecting the capacitor for voltage conversion When connecting the capacitor to the C1P C2P C1N C2N C3N an...

Страница 9: ...age temperature coefficient settings Reference voltage value VREF V Note 1 Temperature coefficient CT C Note 2 Mode name TC1 H VDD L VI TC2 H VDD L VI Min Typ Max Min Typ Max CT0 H H 1 55 1 5 1 45 0 07 0 05 0 03 CT1 H L 1 62 1 5 1 38 0 19 0 15 0 11 CT2 L H 1 65 1 5 1 35 0 42 0 35 0 28 CT3 L L 1 70 1 5 1 30 0 65 0 55 0 45 Note 1 The reference voltage is based on Ta 25 C Note 2 The temperature gradi...

Страница 10: ...ntial will become equal to that of the reference voltage described in Section 5 3 Figure 5 3 VREG setting method and assembly consideration Setting method y Relational expression between VREG and reference voltage y Consumption current for split resistances Setting example The following shows a setting example for outputting VREG 18V when VI 5V and VO 20V at quadruple boosting Determine the total ...

Страница 11: ...of the internal reference voltage Notes on using the voltage stabilization circuit To keep the S1F76540 absolute maximum rating the setting resistor must be connected between VDD and VREG of an S1F76540 that uses the regulator Connecting R1 to VDD of an S1F76540 that does not use the regulator when connecting the S1F76540 in series will result in deterioration or destruction in this IC The stabili...

Страница 12: ...e POFF1X H VDD L VIN POFF2X H VDD L VIN Oscillation circuit Booster Regulator Use PS1 H L ON ON ON All circuit ON state PS2 L L OFF OFF Note 1 OFF Note 2 All circuit OFF state PS3 H H OFF ON ON Slave side in parallel connection Booster Regulator PS4 L H ON ON OFF Note 2 Master side in parallel connection Booster only Note 1 When the booster is off the voltage of approximately VI 0 6V is generated ...

Страница 13: ...each the electric potential that was boosted sufficiently In this case the electric potential of the VO output is boosted smoothly up to the specified voltage after the soft start period has been expired Figure 5 5 Soft start operation Notes on connecting the capacitor for stabilizing the input voltage To stabilize the input voltage VI the capacitor CI to be connected between the VDD and VI pins m...

Страница 14: ...ng magnification VOUT VREG pins Input current IIN 80 mA VI pin Output Current IO N 4 20 N 4 80 N mA N Boosting magnification VOUT VREG pins Allowable dissipation Pd 210 mW Ta 25 C Operating temperature Topr 40 85 C Storage temperature Tstg 55 150 C Soldering temperature and time Tsol 260 10 C S Lead part Note 1 Using with a condition exceeding the above absolute maximum rating may result in malfun...

Страница 15: ...capacitor 180 270 Ω Boosting output impedance RO IO 10mA At quadruple boosting VI 3 0V C1 C2 C3 C0 10µF Tantalum capacitor 230 350 Ω IO 2mA At quadruple boosting VI 5 0V C1 C2 C3 C0 10µF Tantalum capacitor 96 Boosting power conversion efficiency Peff IO 2mA At quadruple boosting VI 3 0V C1 C2 C3 C0 10µF Tantalum capacitor 95 FC VDD POFF1X VI POFF2X VDD VIN 5 0V at no load C1 C2 C3 C0 1µF Tantalum ...

Страница 16: ...70 1 50 1 30 V CT0 TC1 VDD TC2 VDD SSOP product 0 07 0 05 0 03 C CT1 TC1 VDD TC2 VI SSOP product 0 19 0 15 0 11 C CT2 TC1 VI TC2 VDD SSOP product 0 42 0 35 0 28 C Reference voltage temperature coefficient Note 4 CT3 TC1 VI TC2 VI SSOP product 0 65 0 55 0 45 C VIH VI 2 4V to 5 5V Applied pins POFF1X POFF2X FC TC1 TC2 0 2VI V Input voltage level VIL VI 2 4V to 5 5V Applied pins POFF1X POFF2X FC TC1 ...

Страница 17: ...stics Unless otherwise noted VDD 0V VI 5 0V Item Symbol Conditions Min Typ Max Unit Ta 25 C 3 0 4 0 5 0 kHz Internal clock frequency 1 fCL1 FC VDD POFF1X VI POFF2X VDD Applied pin C1P Ta 40 C to 85 C 2 0 4 0 6 0 kHz Ta 25 C 12 0 16 0 20 0 kHz Internal clock frequency 2 fCL2 FC VI POFF1X VI POFF2X VDD Applied pin C1P Ta 40 C to 85 C 8 0 16 0 24 0 kHz ...

Страница 18: ... FC Low FC High C1 to C3 CI CO 10µF 1 Internal clock frequency 1 Temperature 2 Booster operation consumption current Input Voltage 0 5 10 15 20 0 10 20 30 Io mA Vo V Quadruple boosting Ta 25 C C1 to C3 CI CO 10µF VI 5V 3rd boosting Double boosting 0 2 4 6 8 10 12 14 0 5 10 15 20 Io mA Vo V Quadruple boosting Ta 25 C C1 to C3 CI CO 10µF VI 3V 3rd boosting Double boosting 3 Boosting output Vo Output...

Страница 19: ... 10 20 30 Io mA Peff 0 30 60 90 120 150 I IN mA Quadruple boosting Peff Ta 25 C C1 to C3 CI CO 10µF VI 5V 3rd boosting Peff Double boosting Peff Quadruple boosting IIN 3rd boosting IIN Double boosting IIN 0 10 20 30 40 50 60 70 80 90 100 0 5 10 15 20 Io mA 0 10 20 30 40 50 60 70 80 90 100 Peff I IN mA Quadruple boosting Peff Ta 25 C C1 to C3 CI CO 10µF VI 3V 3rd boosting Peff Double boosting Peff ...

Страница 20: ...8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 0 1 1 0 10 0 100 0 Ta 25 C C1 to C3 CI CO 10µF VI 5V RL kΩ V STA1 V 9 Boosting power conversion efficiency 10 Boosting start input power supply voltage Output current 3 Load resistance Input current Output current 3 0 0 0 1 0 2 0 3 0 5 10 15 20 25 30 Io mA VRI 20V VRI 8V VRI 12V V RI V REG V Ta 25 C C1 to C3 CI CO 10µF 7 90 7 91 7 92 7 93 7 94 7 95 7 96 7 97 7...

Страница 21: ...98 3 99 4 00 0 1 1 0 10 0 100 0 Ta 25 C VRI 8V IREG mA V REG V 13 Output voltage VREG Output current 2 14 Output voltage VREG Output current 3 40 30 20 10 0 10 20 30 40 40 20 0 20 40 60 80 100 Ta C V REG Ta V REG 25 C V REG 25 C 100 CT2 CT3 CT1 CT0 20 10 0 10 20 30 40 50 60 40 20 0 20 40 60 80 100 Ta C 100 V REG C V REG 25 C V REG 25 C 15 Reference voltage Temperature gradient 16 Regulator tempera...

Страница 22: ...r connection example Figure 9 1 Setting conditions Internal clock ON Low output mode Booster ON Regulator ON Select CT0 0 05 C Power off method Set the POFF1X pin to level LOW VI all circuits will be turned off About regulator For information about the regulator setting method and notes see Section 5 4 Other setting conditions 1 When using the high output mode Connect the FC pin to VI 2 When chang...

Страница 23: ...al clock ON Low output mode Booster ON Regulator ON Select CT0 0 05 C Power off method Set the POFF1X pin to level LOW VI all circuits will be turned off About regulator For information about the regulator setting method and notes see Section 5 4 Other setting conditions 1 When using the high output mode Connect the FC pin to VI 2 When changing the temperature coefficient CT Change the TC1 and TC2...

Страница 24: ...Internal clock ON Low output mode Booster ON Regulator ON Select CT0 0 05 C Power off method Set the POFF1X pin to level LOW VI all circuits will be turned off About regulator For information about the regulator setting method and notes see Section 5 4 Other setting conditions 1 When using the high output mode Connect the FC pin to VI 2 When changing the temperature coefficient CT Change the TC1 a...

Страница 25: ...ethod Set the POFF2X pin to level LOW VI all circuits will be turned off About ripple voltage The output voltage to be generated in the VO pin is not stabilized therefore it contains the ripple components shown in Figure 9 5 The ripple voltage VRP increases depending on the load current and the approximate value can be obtained in expression 9 1 VO waveform Figure 9 5 Ripple waveform chart IO Load...

Страница 26: ...in the VO pin Figure 9 6 shows a connection example Figure 9 6 3rd boosting connection example Figure 9 6 Setting conditions Internal clock ON Low output mode Booster ON Regulator OFF Power off method Set the POFF2X pin to level LOW VI all circuits will be turned off About ripple voltage For ripple voltage see Section 9 4 Other setting conditions 1 When using the high output mode Connect the FC pi...

Страница 27: ...ed in the VO pin Figure 9 7 shows a connection example Figure 9 7 Double boosting connection example Figure 9 7 Setting conditions Internal clock ON Low output mode Booster ON Regulator OFF Power off method Set the POFF2X pin to level LOW VI all circuits will be turned off About ripple voltage For ripple voltage see Section 9 4 Other setting conditions 1 When using the high output mode Connect the...

Страница 28: ...ternal clock ON Low output mode Internal clock OFF Clocks supplied from master IC Booster ON Booster ON Regulator OFF Regulator ON Select CT0 0 05 C Power off method In the connection example shown in Figure 9 8 setting S1F76540 in the master IC to POFF2X L VI enables you to stop boosting the master and slave ICs however the regulator in the slave IC does not stop When VREG is greater than VI the ...

Страница 29: ...igure 9 9 shows a quintuple boosting regulator connection example with one diode used The cable from VO to VRI must be as short as possible Figure 9 10 shows the electric potential relation diagram Figure 9 9 Quintuple boosting connection example using one diode Figure 9 9 Setting conditions Internal clock ON Low output mode Booster ON Regulator ON Select CT0 0 05 C Figure 9 10 Quintuple boosting ...

Страница 30: ...alue VO 5 VI VF Expression 9 2 Precautions 1 Input and output current conditions To keep the input and output current ratings multiply the entire boosting magnification by the output load current value so that it does not exceed the input current rating when performing high magnification boosting using a diode In the example shown in Figure 9 9 80mA 5 16mA is used as the maximum load current 2 Inp...

Страница 31: ...2 shows the electric potential relation diagram Figure 9 11 Sextuple boosting connection example using two diodes Figure 9 11 Setting conditions Internal clock ON Low output mode Booster ON Regulator ON Select CT0 0 05 C Figure 9 12 Sextuple boosting potential relation using two diodes VDD VI VO VO 4VI 6VI 2 VF 6VI 2 VF VO R1 R2 VDD VO 1 VRI VREG RV VDD FC TC1 TC2 C2P C2N C3N C1N C1P VI POFF1X POF...

Страница 32: ...O 6 VI 2 VF Expression 9 3 Precautions 1 Input and output current conditions To keep the input and output current ratings multiply the entire boosting magnification by the output load current value so that it does not exceed the input current rating when performing high magnification boosting using diodes In the example shown in Figure 9 11 80mA 6 13 3mA is used as the maximum load current 2 Input...

Страница 33: ...ample and Figure 9 14 shows the electric potential relation diagram Figure 9 13 Positive voltage conversion connection example 3rd boosting Figure 9 14 Setting conditions Internal clock ON Low output mode Booster ON Regulator OFF Figure 9 14 Electric potential relation diagram of positive voltage conversion connection example 3rd boosting VI VDD 3VI 3 VF VO 3VI 3 VF VDD VO 1 VRI VREG RV VDD FC TC1...

Страница 34: ...s the boosting output voltage to be reduced In the example shown in Figure 9 11 three diodes are used therefore be sure to drop the voltage by 3 VF as shown in Figure 9 12 The boosting power voltage is indicated in the following expression VO When increasing VO use a diode with the lower VF value VO 3 VI 3 VF Expression 9 4 Precautions 1 Input and output current conditions To keep the input and ou...

Страница 35: ... Setting conditions Internal clock ON Low output mode Booster ON Regulator ON Thermistor resistor RT Power off method Set the POFF1X pin to level LOW VI all circuits will be turned off Regulator temperature coefficient For information about the basic regulator setting method and notes see Section 5 4 The temperature characteristics of the thermistor resistor RT indicate the nonlinearity When compe...

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