Epson S1C63000, Руководство центрального процессора

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EPSON
S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
4.2.2 Symbol meanings
The following indicates the meanings of the symbols used in the instruction list.
Register names
A ........................... Data register A (4 bits)
B ........................... Data register B (4 bits)
BA ........................ BA register pair (8 bits, the B register is the high-order 4 bits)
X ........................... Index register X (16 bits)
XH ........................ XH register (high-order 8 bits of the X register)
XL ......................... XL register (low-order 8 bits of the X register)
Y ........................... Index register Y (16 bits)
YH ........................ YH register (high-order 8 bits of the Y register)
YL ......................... YL register (low-order 8 bits of the Y register)
F ............................ Flag register F (4 bits)
EXT ...................... Extension register EXT (8 bits)
SP1 ....................... Stack pointer SP1 (16 bits, however the setting data is 8 bits of D2 to D9)
SP2 ....................... Stack pointer SP2 (16 bits, however the setting data is 8 bits of D0 to D7)
PC ........................ Program counter PC (16 bits)
In the notation with mnemonics, the register names should be written with a % placed in front of them,
according to the S1C63 Family assembler source format.
%A ....................... A register
%B ........................ B register
%BA ..................... BA register
%X ........................ X register
%XH .................... XH register
%XL ..................... XL register
%Y ........................ Y register
%YH .................... YH register
%YL ..................... YL register
%F ........................ F register
%EXT ................... EXT register
%SP1 .................... Stack pointer SP1
%SP2 .................... Stack pointer SP2
Immediate data
imm2 ................... 2-bit immediate data (0 to 3)
imm4 ................... 4-bit immediate data (0 to 15)
imm6 ................... Software interrupt vector (0100H to 013FH)
imm8 ................... 8-bit immediate data ( 0 to 255)
i7–i0 ..................... Each bit in immX
n4 ......................... 4-bit radix specification data (1 to 16)
n3–n0 ................... Each bit in n4
sign8 .................... Signed 8-bit immediate data (-128 to 127)
s7–s0 .................... Each bit in sign8
addr6 ................... 6-bit address (00H to 3FH)
a5–a0 .................... Each bit in addr6
00addr6 ............... addr6 which specifies an address within 0000H to 003FH
FFaddr6 ............... addr6 which specifies an address within FFC0H to FFFFH