Epson S1C63000, Руководство центрального процессора

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104
EPSON
S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
LD [%ir],[%ir’]+
Load location [ir’ reg.] into location [ir reg.] and increment ir’ reg. 2 cycles
Function: [ir]
←
[ir’], ir’
←
ir’ + 1
Loads the content of the data memory addressed by the ir’ register (X or Y) into the data
memory addressed by the ir register (Y or X). Then increments the ir’ register (Y or X).
Code:
Mnemonic MSB LSB
LD [%X],[%Y]+ 1 1 1 1 0 1 1 1 1 1 0 1 1 1EFBH
LD [%Y],[%X]+ 1 1 1 1 0 1 1 1 1 1 0 0 1 1EF9H
Flags: E I C Z
↓
– – –
Mode: Src: Register indirect
Dst: Register indirect
Extended addressing: Invalid
LD [%ir]+,[%ir’]
Load location [ir’ reg.] into location [ir reg.] and increment ir reg. 2 cycles
Function:
[ir]
←
[ir’], ir
←
ir + 1
Loads the content of the data memory addressed by the ir’ register (X or Y) into the data
memory addressed by the ir register (Y or X). Then increments the ir register (X or Y).
Code:
Mnemonic MSB LSB
LD [%X]+,[%Y] 1 1 1 1 0 1 1 1 1 1 1 1 0 1EFEH
LD [%Y]+,[%X] 1 1 1 1 0 1 1 1 1 1 1 0 0 1EFCH
Flags: E I C Z
↓
– – –
Mode:
Src: Register indirect
Dst: Register indirect
Extended addressing: Invalid