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RTC - 9701 JE

                                                                                                                        

 

MQ - 362 - 03

 

 

Page-9

 

11.3. Alarm functions (/AIRQ) 

From the conditions of the event flags (AF, EXF, VLF and VLF2), you can know the conditions when the clock matches, 

when the voltage decreases and when the oscillation stops.  The data of these bits are kept until cleared with “0”.  Also, since 
output to /AIRQ is possible when each event (except VLF2) is generated, interrupt can be requested to the host. 

 
 

11.3.1. Time alarm (addresses between 8 and A) 

 

11.3.1.1. Explanation of Time alarm (1). 

When the registers corresponding to the minute, the hour, and the day of the week matches with the clock (comparing it 

right after carry is generated 7.8125 ms later), the alarm matching flag (AF) becomes “1”.  At this moment, if the AIE (Alarm 
Interrupt Enable) is enabled (“1”), the /AIRQ pin outputs Active Low. 

With the AE bit (bit 7: the Alarm Enable Don’t care bit) of each alarm registers, the HOUR alarm and the DAY alarm can 

be set.  For the day of the WEEK alarm, multiple days can be set (i.e. Saturdays and Sundays).  The WADA bit specifies the 
alarm to use between the WEEK alarm and the DAY alarm. 

 

Address 

Function 

bit 7 

bit 6 

bit 5 

bit 4 

bit 3 

bit 2 

bit 1 

bit 0 

R/W

Comments

8  MIN 

alarm AE MA40 

MA20

MA10

MA8 MA4 MA2 MA1 

R/W

BCD 

notation

9 HOUR 

alarm 

AE 

¡

 

HA20

HA10

HA8 HA4 HA2 HA1 

R/W

BCD 

notation

WEEK 

alarm 

WA6 WA5 WA4 WA3 WA2 WA1 WA0 

WADA=0

DAY alarm 

AE 

¡

 

DA20

DA10

DA8 DA4 DA2 DA1 

R/W

WADA=1

Extension 

reg. 

 

WADA 

      

R/W

 

Flag 

reg.        AF      

R/W

 

Control 

reg. 

    

AIE 

   

R/W

 

 

Bit name 

Bit data 

Function 

Comments 

Compares the corresponding register 

AE 

Does not compare the corresponding register 
(don't care) 

This is in negative logic, so be careful. 

/AIRQ output is prohibited 

AIE 

/AIRQ output (alarm interrupt is valid) 

 

0 Alarm 

unmatched 

AF 

Alarm matched 

This bit is kept until overwriting with “0”. 

WEEK alarm is set 

WADA 

DAY alarm is set 

 

 

To avoid malfunction, the compare operation is halted while writing to the alarm registers.  If  write to the alarm register 

during this time (period of 7.58ms from carry occurrence), the alarm will not function. 

The compare operation is performed during the carry operation (the interval of the lowest carry digit of the AE enabled 

register).  If the AF bit is cleared exactly when the time matches the alarm data, the alarm will not  function. Even if the current 
time is set to the alarm, the alarm will not  function.

 

 

/AIRQ output 

AF 

01s 

00s 

59s 

SEC 

AF bit clear 

AIE 

Compare 

Disable 

* This is an example of /AIRQ w aveform w hen connected to the pull-up resistor.

 

Содержание RTC-9701JE

Страница 1: ...MQ362 03 Application Manual Real Time Clock Module RTC 9701JE Model Product Number RTC 9701JE Q4197017x000100 ...

Страница 2: ...intellectual property rights is granted by implication or otherwise and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party This material of portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade La...

Страница 3: ... 9 2 VLF VOLTAGE DETECTION CHARACTERISTICS 5 10 EEPROM MEMORY CHARACTERISTICS 6 11 REGISTER TABLE 7 11 1 REGISTER TABLE 7 11 2 DESCRIPTION OF RTC FUNCTIONS ADDRESSES BETWEEN 0 AND 7 8 11 3 ALARM FUNCTIONS AIRQ 9 11 4 TIMER FUNCTION TIRQ 12 11 5 CONTROL REGISTER FLAG REGISTER 13 12 READ WRITE DATA 14 12 1 SERIAL DATA TRANSFER METHOD 14 12 2 READING WRITING IN RTC MODE 15 12 3 READ WRITE EEPROM MEMO...

Страница 4: ...sumption at 0 8 µA 3 V Typ Available as small package JE VSOJ 20 pin 1 Overview This module is a high precision RTC module with serial interface in 4 lines form or 3 lines form It has a built in 32 768 kHz crystal oscillator The system IC in the package has a variety of built in functions such as high precision clock circuitry crystal oscillator 32 768 kHz output nonvolatile memory voltage detecti...

Страница 5: ...is is a chip enabled input pin with the built in pull down resistor When the CE pin is at the H level access to this RTC becomes possible When the CE pin is at the L level the DO pin is at the high impedance level and the CLK and DI pins would not accept input CLK 7 Output This is the shift clock input pin for serial data transfer In the write mode it takes in data from the DI pin using the CLK si...

Страница 6: ...rence at 25 C 10 120 10 6 Oscillation start up time tSTA Ta 25 C VDD 3 0 V 3 Max s Aging fa Ta 25 C VDD 3 0 V first year 5 Max 10 6 year 1 Equivalent to 1 minute of monthly deviation excluding offset 7 DC Electrical characteristics If not specifically indicated VDD 2 7 V to 3 6 V VDD2 1 8 V to 5 5 V GND 0 V Ta 40 C to 85 C Item Symbol Condition Min Typ Max Unit IDD1 VDD 3 0 V FOUT output OFF 0 2 3...

Страница 7: ...fter communication starts CE HIGH If it s at the Ready state communication is permitted If it s at the Busy state either the clock is being updated or the EEPROM Memory is being written In this case wait until it becomes Ready or stop communication CE LOW once to restart some time after By any chance a data is transferred when it is at the Busy state that data is not guranteed to be safe The Busy ...

Страница 8: ...for detection circuitry VEX VEX pin 2 3 2 5 2 7 V Hysteresis voltage VHYS 70 120 170 mV Low active voltage VACT IOL 1 mA VOL 0 4 V 1 4 V Be sure to connect a filter capacitor of at least 0 1 µF near VEX GND 9 2 VLF voltage detection characteristics If not specifically indicated VDD 2 7 V to 3 6 V VDD2 1 8 V to 5 5 V GND 0 V Ta 40 C to 85 C Item Signal Condition Min Typ Max Unit Current consumption...

Страница 9: ...ite data hold time tEDH 160 ns Read data delay time tERD CL 65 pF 10 pF 240 ns DO output switching time tEZR CL 65 pF 10 pF 170 ns DO output disable time tERZ CL 65 pF 10 pF RL 10 k 240 ns Ready setup time tERDY 65 ns Input rise and fall time tEr tEf 20 to 80 of VDD 30 ns Power for the EEPROM Memory is supplied from VDD In order to turn the power OFF after writing make sure to save tWNV before tur...

Страница 10: ... Reserved Reserved R W Prohibition R W Prohibition C Interval Timer TDUTY CT6 CT5 CT4 CT3 CT2 CT1 CT0 R W D Extension Reg 4 TEST WADA UDUTY USEL TSEL1 TSEL0 R W E 5 Flag Reg VLF2 UF TF AF EXF VLF R W F Control Reg UIE TIE AIE EXIE VLIE R W Note1 1 At the initial power supply the values of the registers are not fixed so please initialize them before use While initializing do not set impossible data...

Страница 11: ...EK register address 3 This register is a septenary BCD counter counts from 0 to 6 It is incremented when carry is generated from the HOUR register This register does not generate carry to a higher register Since this register is not connected with the YEAR MONTH and DAY registers it needs to be set again with the matching day of the week if any of the YEAR MONTH or DAY registers have been changed ...

Страница 12: ...it 0 R W Comments 8 MIN alarm AE MA40 MA20 MA10 MA8 MA4 MA2 MA1 R W BCD notation 9 HOUR alarm AE HA20 HA10 HA8 HA4 HA2 HA1 R W BCD notation WEEK alarm WA6 WA5 WA4 WA3 WA2 WA1 WA0 WADA 0 A DAY alarm AE DA20 DA10 DA8 DA4 DA2 DA1 R W WADA 1 D Extension reg WADA R W E Flag reg AF R W F Control reg AIE R W Bit name Bit data Function Comments 0 Compares the corresponding register AE 1 Does not compare t...

Страница 13: ... 1 If you desire no hardware interrupt set the AIE bit to 0 and monitor the AF bit with software as required 2 Usage example a Set the alarm to go off at 6 p m tomorrow when the WADA bit specifies the WEEK alarm l Write 0 to the AIE bit and 0 to the AF bit l Write 0 to the WADA bit selects the WEEK alarm l Write 1 to the AE bit of the WEEK DAY alarm l Shift the current day of the week recorded in ...

Страница 14: ... becomes Active Low This state is kept until VLF is cleared In this circuitry if the VLIE bit is disabled the current consumption may be suppressed to minimum but the voltage monitor circuitry will not operate If the voltage decreases momenteraly for less than 10 seconds VLF may not be detected so be careful Bit name Bit data Function Comments 0 AIRQ output is prohibited VDD2 voltage monitor circu...

Страница 15: ...ontrol reg TIE R W Bit name Function Comments TIE 0 TIRQ output prohibited 1 TIRQ out alarm interrupt is valid TF 0 TIRQ Hi Z 1 TIRQ Active Low Opposite logic of TIRQ TSEL1 TSEL0 Clock Min CT 00 hex Max CT 7F hex Unit 0 0 1024 Hz 0 98 125 ms 0 1 64 Hz 15 625 2000 ms Do not set Duty 1 0 1 Hz 1 120 s 1 1 1 min 1 120 min TDUTY 0 Duty 50 1 0 2 Hz 0 5 60 s TDUTY 1 Low width 7 8125 ms Source clock setti...

Страница 16: ...arm section 11 3 2 2 l TIE This is the enable bit for the timer For details see the Variable interval timer section 11 4 1 l AIE This is the enable bit for the time alarm For details see the Time alarm section 11 3 1 11 5 2 Flag register This register is the flag register For each event alarm and interval timer generated 1 is set Set it to 0 to clear To keep the corresponding register state set it...

Страница 17: ...its determines the mode m3 m2 m1 m0 Mode field Read Write Reserved BANK register 0 0 write 0 Data bit 1 1 read 0 00 RTC mode 01 Reserved 10 EEPROM Memory 11 Reserved Make sure m2 is set to 0 12 1 2 Address field and data field l RTC mode m1 bit 0 Mode field m3 m2 m1 m0 Address field a3 a2 a1 a0 Data field d7 d6 d5 d4 d3 d2 d1 d0 l EEPROM Memory mode m1 bit 1 Mode field m3 m2 m1 m0 seg3 seg2 seg1 a...

Страница 18: ...ite the flags continuous access is limited to 1 second Example of writing CE CLK DI a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 Address Write mode setting code Write data d0 m0 0 m0 0 m1 0 m2 0 m2 0 m3 0 m1 0 m3 0 Address setting Write mode setting code Write data While transferring data switching to the EEPROM Memory mode is prohibited 12 2 2 Reading in RTC mode 1 Afte...

Страница 19: ...he data field If the Busy Ready signal is ignored make sure to reserve tWNV CE CLK Mode reserved reserved Address setting Write data m3 0 m1 1 m2 0 m0 0 0 0 0 0 a7 a6 a5 a4 a3 a2 a1 a0 dF dE dD dC dB dA d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 12 3 3 Read EEPROM Memory 1 After setting the address data can be transferred This mode can be used only when the EEPROM Memory mode is set 2 After CE input rises set ...

Страница 20: ... 12 6 11 7 10 8 9 VBAT X32CLK RESET V3 3 V3 3 GND U3 RTC9701JE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 VDD2 VEX OE AIRQ TIRQ CE CLK DI DO VDD FOUT GND GND NC1 NC2 NC3 NC4 NC5 NC6 NC7 IRQN DOUT C3 0 1µ C2 0 1µ CLK R1 DIN ASIC or CPU OE D3 SBD Diode VDD If the main power source and the diode is wired OR the consumption of the battery is reduced only when VBAT V3 3 For the safety purpose o...

Страница 21: ...Unit mm 1 5 3 8 1 5 0 65 9 5 85 0 3 0 35 0 65 5 4 7 0 0 3 1 20 11 10 The cylinder of the crystal oscillator can be seen in this area front and back but it has no affect on the performance of the device 14 2 Marking layout RTC 9701 JE VSOJ 20pin Symbol mark R9701 E 1234A Type Production lot The displayed content indicates the general markings and display but are not the standards for the fonts size...

Страница 22: ...voltage 3 How to find the date difference Date difference f f 86400 seconds For example f f 11 574 10 6 is an error of approximately 1 second day 1 Example of frequency and temperature characteristics 150 100 50 0 50 0 50 100 Temperature C Frequency f T 10 6 θT 25 C Typ α 0 035 10 6 Typ 2 Example of frequency and voltage characteristics 3 2 Frequency f v 10 6 3 0 3 4 5 Condition VDD 3 V 3 V as ref...

Страница 23: ... open circuit state can lead to unstable voltage level and malfunctions due to noise Therefore pull up or pull down resistors should be provided for all unused input pins 16 2 Notes on packaging 1 Soldering temperature conditions If the temperature within the package exceeds 260 C the characteristics of the crystal oscillator will be degraded and it may be damaged Therefore always check the mounti...

Страница 24: ...Les Conquérants 1 Avenue de l Atlantique Z A de Courtaboeuf 2 91976 Les Ulis Cedex France Phone 33 0 1 64862350 Fax 33 0 1 64862355 ASIA EPSON CHINA CO LTD 23F Beijing Silver Tower 2 North RD DongSangHuan ChaoYang District Beijing China Phone 86 10 6410 6655 Fax 86 10 6410 7319 http www epson com cn 4F Bldg 27 No 69 Gui Qing Road Cao hejing Shanghai China Phone 86 21 6485 0835 Fax 86 21 6485 0775 ...

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