Contents
page
Chapter 1 - Introduction ................................................ 1-1
P55-TH Board Layout .............................................................. 1-2
Chapter 2 - Hardware Design ......................................... 2-1
Motherboard Layout ............................................................. 2-1
Connectors and Jumpers ....................................................... 2-2
System Memory configuration .............................................. 2-4
Cache Memory configuration ............................................... 2-6
Integrated PCI Bridge ........................................................... 2-8
Chapter 3 - Award BIOS ................................................ 3-1
Standard CMOS Setup ......................................................... 3-2
BIOS Features Setup ............................................................ 3-2
Chipset Features Setup ......................................................... 3-6
Power Management Setup .................................................... 3-8
PNP/PCI Configuration Setup .............................................. 3-10
Integated Peripherals ............................................................ 3-14
Load Setup Defaults ............................................................. 3-12
Change password ................................................................. 3-15
IDE HDD Auto Detection ..................................................... 3-16
HDD Low Level Format ....................................................... 3-18
Save & Exit Setup ............................................................... 3-18
Exit Without Saving ............................................................. 3-18
Chapter 4
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Onboard Technical Information...................4-1
I/O & Memory Map .............................................................. 4-1
Time & DMA Channels Map ............................................... 4-2
Interrupt Map ....................................................................... 4-2
RTC & CMOS RAM Map .................................................... 4-3
Appendix A: Post Codes ....................................................... 4-4
Appendix B: I/O Connector .................................................. 4-8
