EPOX KP6-LS, Руководство пользователя

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Appendix KP6-LS
A-7
3E Try to turn on Level 2 cache.
Note: Some chipset may need to turn on the L2 cache in this stage.
But usually, the cache is turn on later in POST 61h.
3F-40 Reserved.
BF 1. Program the rest of the Chipset's value according to Setup.
(Later Setup Value Program)
41 2. If auto-configuration is enabled, program the chipset with
pre-defined Values.
42 Initialize floppy disk drive controller.
43 Initialize Hard drive controller.
45 If it is a PnP BIOS, initialize serial & parallel ports.
44 Reserved.
45 Initialize math coprocessor.
46-4D Reserved.
4E If there is any error detected (such as video, kb...), show all error
messages on the screen & wait for user to press <F1> key.
4F 1. If password is needed, ask for password.
2. Clear the Energy Star Logo. (Green BIOS only)
50 Write all CMOS values currently in the BIOS stack area back into the
CMOS.
51 Reserved.
52 1. Initialize all ISA ROMs.
2. Later PCI initializations. (PCI BIOS only)
-
assign IRQ to PCI devices.
- initialize all PCI ROMs.
3. PnP Initialzations. (PnP BIOS only)
-
assign IO, Memory, IRQ & DMA to PnP ISA devices.
- initialize all PnP ISA ROMs.
4. Program shadows RAM according to Setup settings.
5. Program parity according to Setup setting.
6. Power Management Initialization.
-
Enable/Disable global PM.
- APM interface initialization.
53 1. If it is NOT a PnP BIOS, initialize serial & parallel ports.
2. Initialize time value in BIOS data area by translate the RTC time
value into a timer tick value.
60 Setup Virus Protection. (Boot Sector Protection) functionality
according to Setup setting.