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Endace Measurement Systems Ltd

EDM01.05-01r1 DAG 4.3GE Card User Manual

www.endace.com

7.2 Timestamps

, continued

Example code

Here is some example code showing how a 64-bit ERF timestamp (erfts)
can be converted into a struct timeval representation (tv).

unsigned long long lts;
struct timeval tv;

lts = erfts;
tv.tv_sec = lts >> 32;
lts = ((lts & 0xffffffffULL) * 1000 * 1000);
lts += (lts & 0x80000000ULL) << 1; /* rounding */
tv.tv_usec = lts >> 32;
if(tv.tv_usec >= 1000000) {

tv.tv_usec -= 1000000;

tv.= 1;

}

Revision 6. 22 September 2005.

Содержание DAG 4.3GE

Страница 1: ...EDM01 05 01r1 DAG 4 3GE Card User Manual...

Страница 2: ...46 Hamilton 2001 New Zealand Phone 64 7 839 0540 Fax 64 7 839 0543 support endace com www endace com Endace USA Ltd Suite 220 11495 Sunset Hill Road Reston Virginia 20190 United States of America Phon...

Страница 3: ...gital device pursuant to Part 15 of the Federal Communications Commission FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operat...

Страница 4: ...Status 11 4 2 DAG 4 3GE Card LED Display Functions 12 4 3 Configuration in WYSYCC Style 13 4 4 DAG 4 3GE Card Capture Session 14 4 5 Inspect Interface Statistics 15 4 6 Reporting Problems 17 5 0 RUNN...

Страница 6: ...The purpose of this DAG 4 3GE Card User Manual is to describe Installing DAG 4 3GE Card Setting Optical Power Confidence Testing Running Data Capture Software Synchronizing Clock Time Data Formats Ove...

Страница 7: ...he DAG 4 3GE is capable of transmitting packets at 100 line rate on both ports while simultaneously receiving packets at 100 line rate on both ports 1 3 DAG 4 3GE Card Architecture Description Serial...

Страница 8: ...ata processing tool The IP packet classification specifications are Packets are classified by TCP IP header fields and or payload content Up to 16 384 TCP IP header classification rules Up to 2 000 ar...

Страница 9: ...east one free PCI X 1 0 slot supporting 66 133MHz operation Software distribution free space of 30MB Operating system For convenience the Debian 3 1 Sarge Linux system is included on the Endace Softwa...

Страница 10: ...perating System and Endace Software Insert DAG 4 3GE Card into PC DAG 4 3GE Card Port Connectors Pluggable Optical Transceivers 2 1 Installation of Operating System and Endace Software Description If...

Страница 11: ...ime synchronization This socket should never be connected to an Ethernet network or telephone line 2 4 Pluggable Optical Transceivers Description Some newer versions of the DAG 4 3GE cards are availab...

Страница 12: ...er Manual www endace com 2 4 Pluggable Optical Transceivers continued Figure Figure 2 1 shows the pluggable optical transceivers Pluggable Optical Transceivers Figure 2 1 Pluggable Optical Transceiver...

Страница 14: ...covers the following sections of information Optical Power Input Splitter Losses 3 1 Optical Power Input Description The optical power input to DAG must be within the receiver s dynamic range of 0 to...

Страница 15: ...r will have losses of about 10 dB in the high loss output and 2 dB in the low loss output The 1000baseSX transceiver uses 850nm optics Splitters used must be designed for 850nm as the insertion loss w...

Страница 16: ...covers the following sections of information Interpreting DAG 4 3GE Card LED Status DAG 4 3GE Card LED Display Functions Configuration in WYSYCC Style DAG 4 3GE Card Capture Session Inspect Interface...

Страница 17: ...Port B Link Error LED 7 PPS Out Pulse Per Second Out indicates card is sending a clock synchronization signal LED 8 PPS In Pulse Per Second In indicates card is receiving an external clock synchroniza...

Страница 18: ...ive streams txonly Assign all buffer memory to transmit streams rxtx Assign buffer memory to transmit and receive streams Auto negotiate The DAG 4 3GE can operate in one of two modes nic and nonic The...

Страница 19: ...ck card receiver ports light levels are correct using an optical power meter The card receiver ports are the lower of each dual LC style connectors the closest to the PCI X slot Cover unused ports wit...

Страница 20: ...is Locked to Data Stream Configure card according to local settings Check through the physical layer statistics that the card is locked to the data stream 4 5 Inspect Interface Statistics Description...

Страница 21: ...d statistics from port B only for the above configuration dag endace dagfour d dev dag1 bei Port B Sync Link Auto RFlt Bad Symb CRC Fail Bytes Frames 1 1 1 0 0 0 15785982656 343173536 1 1 1 0 0 0 6893...

Страница 22: ...erating system version 4 DAG software version package in use 5 Any compiler errors or warnings when building DAG driver or tools 6 For Linux and FreeBSD messages generated when DAG device driver is lo...

Страница 24: ...s tools used for data capture are in the tools sub directory For a typical measurement session ensure the driver is loaded the firmware has been downloaded and the card is configured The integrity of...

Страница 25: ...t capture for example tools dagfour d dag0 varlen slen 1536 Capturing non standard ethernet frames For frames larger than 1500 Bytes in size known as Jumbo frames the value of long is increased For ex...

Страница 26: ...s are configured a capture session is started by tools dagsnap v o tracefile Option v provides user information during capture it can be omitted for automated trace runs If the o tracefile parameter i...

Страница 27: ...ts subsequently are discarded by the DAG card Any loss can be detected in band by observing the Loss Counter lctr field of the Extensible Record Format ERF The Endace ERF is detailed in Chapter 7 of t...

Страница 28: ...spond to ARP ping or router discovery protocols It will only transmit packets explicitly provided by the user This capability allows the DAG card to be used as a simple traffic load generator The DAG...

Страница 29: ...agbits dagbits vvc align64 f tracefile erf If a captured trace file is not available the daggen program is capable of generating trace files containing simple traffic patterns This allows the DAG card...

Страница 30: ...in MB and Y is the amount of memory allocated to transmit stream 1 in MB By default the memory is evenly split between the receive streams the transmit streams have no memory allocated If the card is...

Страница 31: ...and memory performance The dagfwddemo program The dagfwddemo program is provided as a demonstration of how this can be achieved This program forwards packets bidirectionally applying a user supplied...

Страница 32: ...erence can be obtained from an external clock by connecting to the DAG card using the synchronization connector or the host PCs clock can be used in software as a reference source without additional h...

Страница 33: ...old in ns default 596 Option default RS422 in none out none None in none out rs422in RS422 input hostin Host input unused overin Internal input synchronize to host clock auxin Aux input unused rs422ou...

Страница 34: ...ning NTP to synchronize its own clock then the DUCK clock is less smooth because the PC clock is adjusted in small jumps However overall the DUCK clock does not drift away from UTC The synchronization...

Страница 35: ...is configured as the clock master for the other Locking cards together Although the master card s clock will drift against UTC the cards are locked together The cards are locked together by connectin...

Страница 36: ...88424ns crystal Actual 49999354Hz Synthesized 16777216Hz input Total 87464 Bad 0 Singles Missed 0 Longest Sequence Missed 0 start Wed Apr 27 14 27 41 2005 host Thu Apr 28 14 59 14 2005 dag Thu Apr 28...

Страница 37: ...d 1 Longest Sequence Missed 1 start Thu Apr 28 14 55 20 2005 host Thu Apr 28 14 59 06 2005 dag Thu Apr 28 14 59 06 2005 Connecting time distribution server The TDS 2 module connects to any DAG card wi...

Страница 38: ...or pin outs Figure 6 1 RJ45 Plug and Socket Connector Pin outs Out pin connections Normally the GPS input should be connected to the A channel input pins 3 and 6 The DAG can also output a synchronizat...

Страница 40: ...1 shows the generic variable length record The diagram is not to scale timestamp timestamp type flags rlen lctr wlen rlen 16 bytes of record Table 7 1 Generic Variable Length Record Data format The fo...

Страница 41: ...e Lctr loss counter A 16 bit counter recording the number of packets lost since the previous record Records can be lost between the DAG card and memory hole due to overloading on PCI bus The counter s...

Страница 42: ...ary 1970 The high 32 bits contain the integer number of seconds while the lower 32 bits contain the binary fraction of the second This allows an ultimate resolution of 2 32 seconds or approximately 23...

Страница 43: ...g how a 64 bit ERF timestamp erfts can be converted into a struct timeval representation tv unsigned long long lts struct timeval tv lts erfts tv tv_sec lts 32 lts lts 0xffffffffULL 1000 1000 lts lts...

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