Elektor EPROM, Руководство пользователя

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1 and 3 close first, followed by contacts 1 and
2. Then contacts 1 and 3 open, followed by
contacts 1 and 2. If the knob is turned to the
left, as it moves between two positions con-
tacts 1 and 2 close first, followed by contacts
1 and 3. Clearly, when the switch is being
rotated to the right contacts 1 and 2 are still
open when contacts 1 and 3 close, while with
rotation to the left contacts 1 and 2 will
already be closed.
Little more is needed to cause the 4049
CMOS synchronous counters (IC1 and IC3) to
count up or down. R1–R4, C1 and C2, fol-
lowed by Schmitt triggers IC8c and IC8d, are
needed to produce reliable pulses from the
bouncing contacts.
The two 4029 counters form a two-digit
decade counter, so values between
1 and 99 can be set using the rotary
switch. You might consider this to be
a drawback, since after all, the sim-
ple version can set 255 addresses.
However, this is an intentional
choice, with the primary reason
being that rotating the knob through
100 addresses (or at most 50 if you
approach things right) is just about
the limit of most people’s patience.
Also, since we’re using a standard
logic family, more than three times
as many components would other-
wise be required.
Two type 4543 BCD-to-7-segment
decoder/drivers are used to convert
the two decades from the 4029 coun-
ters into signals that drive two
7-segment displays (LD1 and LD2)
via resistors R9–R16.
We now have easily readable
addresses between 0 and 100 on a
display, but what we ultimately
need is to have the two 4-bit BCD
codes from the 4029s converted into
an 8-bit binary code that master con-
troller can understand. This trick is
performed by two 4-bit binary full
adders (type 4008), whose operation
we will not attempt to explain here.
Suffice it to say that we have here is
a sort of primordial computer IC.
The 8-bit binary code can only be
GENERAL INTEREST
38 Elektor Electronics 11/2002
1.2+/1.2-
1.2CT=15
1.2CT=0
IC1
4029B
B/D
12
13
15
10
14
11
3D
C3
G1
M 2
4
5
1
7
2
6
3
9
BCD/7SEG
4543
IC4
9D,1
9D,2
9D,4
9D,8
N10
a10
b10
c10
d10
e10
f10
g10
[T]
14
15
13
12
11
10
C9
EN
1
5
4
6
7
9
3
2
LD1
10
a
9
b
7
c
5
d
4
e
2
f
1
g
3 8
6
CA CA
dp
HDN11050
R7
270
Ω
R8
270
Ω
R9
270
Ω
R6
270
Ω
R10
270
Ω
R11
270
Ω
R12
270
Ω
+5V
1.2+/1.2-
1.2CT=15
1.2CT=0
IC3
4029B
B/D
12
13
15
10
14
11
3D
C3
G1
M 2
4
5
1
7
2
6
3
9
BCD/7SEG
4543
IC5
9D,1
9D,2
9D,4
9D,8
N10
a10
b10
c10
d10
e10
f10
g10
[T]
14
15
13
12
11
10
C9
EN
1
5
4
6
7
9
3
2
LD2
10
a
9
b
7
c
5
d
4
e
2
f
1
g
3 8
6
CA CA
dp
HDN11050
R14
270
Ω
R15
270
Ω
R16
270
Ω
R13
270
Ω
R17
270
Ω
R18
270
Ω
R19
270
Ω
+5V
R5
10k
C3
4 7
8
9
10
IC8.C
&
12
13
11
IC8.D
&
+5V
R4
10k
0W25
R3
10k
0W25
C2
10n
C1
10n
+5V
R1
560
Ω
0W25
R2
560
Ω
0W25
S1
4
5
2
3
1
1 2
3
IC8.A
&
5 6
4
IC8.B
&
4014B
IC2
SRG8
C1
11
≥
1
2D
1D
1D
1D
12
13
14
15
10
7
6
5
4
3
1
9
2
K3
K4
R22
100k
+5V
IC9.B
5
4 3
IC9.D
6
8 9
IC9.C
12
11 10
IC10.A
13
1 2
IC10.B
5
4 3
IC10.D
6
8 9
IC10.C
12
11 10
IC9.A
13
1 2
8x 47k 1
2 3 4 5 6 7 8 9
R21
+5V
R20
47k
4008B
IC6
15 14
10
11
12
13
A1
B1
A2
B2
A3
B3
A3
B4
S4
S3
S2
S1
CI
CO
7
6
5
2
1
9
4
3
+5V
K1
4008B
IC7
15 14
10
11
12
13
A1
B1
A2
B2
A3
B3
A3
B4
S4
S3
S2
S1
CI
CO
7
6
5
2
1
9
4
3
K2
S2
8 1 4 5 3 2 6 7
CONTROLLER
OTHER DECODERS
+5V
CONTROLLER
IC1
16
8
IC2
16
8
IC3
16
8
IC4
16
8
IC5
16
8
IC6
16
8
IC7
16
8
IC8
14
7
IC9
14
7
IC10
14
7
C4
100n
C5
100n
+5V
+5V
+5V
020125 - 11
IC9, IC10 = 4066B
0W25
PULSE
SELECT
IC8 = 4093B
16V
PRINT
1
2
3
4
5
6
7
8
9
10
K2
Figure 3. Schematic diagram of the controller address programmer.