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EM78P458/459

OTP ROM

EM78P458/459

8-BIT MICRO-CONTROLLER

Version 1.3

ELAN MICROELECTRONICS CORP.

No. 12, Innovation 1

RD., Science-Based Industrial Park

Hsin Chu City, Taiwan, R.O.C.

TEL: (03) 5639977

FAX: (03)5782037(SL) 5630118 (FAE)

Содержание EM78P458

Страница 1: ...9 OTP ROM EM78P458 459 8 BIT MICRO CONTROLLER Version 1 3 ELAN MICROELECTRONICS CORP No 12 Innovation 1st RD Science Based Industrial Park Hsin Chu City Taiwan R O C TEL 03 5639977 FAX 03 5782037 SL 5...

Страница 2: ...Power on reset content 2003 07 01 Application Note AN 001 A D Pre amplifier AN 002 Calibration Offset on A D AN 003 Example of Microcomputer Digital Thermometer AN 004 Tips on how to apply EM78P458 A...

Страница 3: ...It is equipped with a 4K 13 bit Electrical One Time Programmable Read Only Memory OTP ROM With its OTP ROM feature it is able to offer a convenient way of developing and verifying user s programs More...

Страница 4: ...h selective signal sources trigger edges and overflow interrupt 8 bit multichannel Analog to Digital Converter with 8 bit resolution Dual Pulse Width Modulation PWM with 10 bit resolution One pair of...

Страница 5: ...DIP 300mil EM78P458AP 20 pin SOP 300mil EM78P458AM 24 pin skinny DIP 300mil EM78P459AK 24 pin SOP 300mil EM78P459AM Power on voltage detector available 2 0V 0 15V This specification is subject to chan...

Страница 6: ...L type Crystal input terminal or external clock input pin RC type RC oscillator input pin OSCO 17 O XTAL type Output terminal for crystal oscillator or external clock input pin RC type Clock output wi...

Страница 7: ...le power on reset P51 P57 15 17 23 24 1 2 I O General purpose I O pin Default value while power on reset P60 P67 3 4 8 13 I O General purpose I O pin Default value while power on reset INT 14 I Extern...

Страница 8: ...is not a physically implemented register Its major function is to perform as an indirect addressing pointer Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Regis...

Страница 9: ...bits of the PC are cleared Any instruction that is written to R2 e g ADD R2 A MOV R2 A BC R2 6 will cause the ninth bit and the tenth bit A8 A9 of the PC to be cleared Thus the computed jump is limite...

Страница 10: ...ogram memory page Address 0 0 Page 0 000 3FF 0 1 Page 1 400 7FF 1 0 Page 2 800 BFF 1 1 Page 3 C00 FFF Bit 4 T Time out bit Set to 1 by the SLEP and WDTC commands or during Power on and reset to 0 by W...

Страница 11: ...K 2 STACK 1 STACK 0 R8 00 32x8 Bank Register Bank 0 01 32x8 Bank Register Bank 1 IOCD0 IOC50 IOC60 IOCE0 IOCF0 STACK 5 STACK 6 STACK 7 20 20 3F 3F R9 5 IOCS 0 IOCC0 IOCB0 IOC90 GCON 1 IOC61 DT1L IOC51...

Страница 12: ...it 3 ADPD ADC Power down mode 1 ADC is operating 0 switch off the resistor reference to save power even while the CPU is operating Bit2 Bit0 ADIS2 ADIS0 Analog Input Select 000 AN0 001 AN1 010 AN2 011...

Страница 13: ...ed reset by software Bit 4 PWM1IF PWM1 Pulse Width Modulation interrupt flag Set when a selected period is reached reset by software Bit 5 PWM2IF PWM2 Pulse Width Modulation interrupt flag Set when a...

Страница 14: ...n the TCC pin Bit 5 TS TCC signal source 0 internal instruction cycle clock If P54 is used as I O pin TS must be 0 1 transition on the TCC pin Bit 6 INT Interrupt enable flag 0 masked by DISI or hardw...

Страница 15: ...ypasses the input signal to the ADC 1 OP1 is on Bit 5 Bit 3 G22 and G20 Select the gain of OP2 000 IS x 1 default value 001 IS x 2 010 IS x 4 011 IS x 8 100 IS x 16 101 IS x 32 Legend IS the input sig...

Страница 16: ...D D D 100 A A A A A D D D 101 A A A A A A D D 110 A A A A A A A D 111 A A A A A A A A Bit 1 Bit 0 CKR1 CKR0 The prescaler of oscillator clock rate of ADC 00 1 4 default value 01 1 16 10 1 64 11 The o...

Страница 17: ...51 pin Bit 5 OD5 Control bit is used to enable the open drain of the P52 pin Bit 6 OD6 Control bit is used to enable the open drain of the P54 pin Bit 7 OD7 Control bit is used to enable the open drai...

Страница 18: ...reading Port 5 R5 Refer to Fig 7 EIS is both readable and writable Bits 0 5 Not used 10 IOCF0 Interrupt Mask Register 7 6 5 4 3 2 1 0 CMPIE PWM2IE PWM1IE ADIE EXIE ICIE TCIE Bit 0 TCIE TCIF interrupt...

Страница 19: ...1E T2EN T1EN T2P1 T2P0 T1P1 T1P0 Bit 7 PWM2E PWM2 enable bit 0 PWM2 is off default value and its related pin carries out the P52 function 1 PWM2 is on and its related pin will be set to output automat...

Страница 20: ...e 1 Positive voltage Bit 5 Bit 3 VOF1 2 VOF1 0 Offset voltage bits Bit 1 Bit 0 PWM1 9 PWM1 8 The Most Significant Byte of PWM1 Duty Cycle A specified value keeps the PWM1 output to stay at high until...

Страница 21: ...iod time base of PWM2 The frequency of PWM2 is the reverse of the period 18 IOCC1 DL1L the Least Significant Byte Bit 7 Bit 0 of Duty Cycle Latch of PWM1 The content of IOCC1 is read only 19 IOCD1 DL1...

Страница 22: ...at every instruction cycle without prescaler Referring to Fig 5 selection of CLK Fosc 2 or CLK Fosc 4 depends on the CODE Option bit CLKS CLK Fosc 2 if CLKS bit is 0 and CLK Fosc 4 if CLKS bit is 1 If...

Страница 23: ...orts The function of Pull high Pull down and Open drain can be set internally by IOCB0 IOCC0 and IOCD0 respectively Port 6 features an input status changed interrupt or wake up function Each I O pin c...

Страница 24: ...l Register for Port 5 PCRD M U X IOD 0 1 INT PDRD P50 INT Bit 6 of IOCE0 PCWR D Q Q _ CLK P R C L PDWR D Q Q _ CLK P R C L P R C L CLK D Q Q _ P R C L CLK D Q Q _ PORT TI 0 NOTE Pull high down and Ope...

Страница 25: ...he Circuit of I O Port and I O Control Register for P60 P67 SLEP T17 T10 T11 IOCE 1 Interrupt ENI Instruction DISI Instruction Interrupt Wake up from SLEEP Next Instruction Wake up from SLEEP CLK CLK...

Страница 26: ...approximately 18ms one oscillator start up timer period after the reset is detected Once the RESET occurs the following functions are performed The oscillator is running or will be started The Program...

Страница 27: ...must be disabled by software However the WDT bit in the option register remains enabled Hence the EM78P458 459 can be awakened only by Case 1 or 3 b if WDT is enabled before SLEP Port 6 Input Status...

Страница 28: ...sable global interrupt SLEP Sleep NOP One problem user must be aware of is that after waking up from the sleep mode the WDT function will enable automatically The WDT operation being enabled or disabl...

Страница 29: ...Previous status before reset Table 6 The Status of RST T and P being Affected by Events Event T P Power on 1 1 WDTC instruction 1 1 WDT time out 0 P SLEP instruction 1 0 Wake up on pin changed during...

Страница 30: ...errupt is enabled RF the interrupt status register that records the interrupt requests in the relative flags bits IOCF0 is an interrupt mask register The global interrupt is enabled by the ENI instruc...

Страница 31: ...le utilizes successive approximation to convert the unknown analog signal into a digital value The result is fed to the ADDATA Input channels are selected by the analog input multiplexer via the ADCON...

Страница 32: ...software ADPD bit 3 ADC Power down Mode 1 ADC is operating 0 switch off the resistor reference to save power even when the CPU is operating ADIS2 ADIS0 bit 2 0 Analog Input Select 000 AN0 001 AN1 010...

Страница 33: ...ADC is from WDT ring oscillator frequency frequency 256 18ms 14 2Khz 1 3 GCON IOC90 As shown in Fig 12 OP1 and OP2 the gain amplifiers are located in the middle of the analog input pins ADC1 and ADC5...

Страница 34: ...run at the maximum frequency without sacrificing the accuracy of A D conversion For the EM78P458 459 the conversion time per bit is about 4 s Table 8 shows the relationship between Tct and the maximum...

Страница 35: ...lag to be set or the ADC interrupt to occur 6 Read ADDATA the conversion data register 7 Clear the interrupt flag bit ADIF 8 For next conversion go to Step 1 or Step 2 as required At least 2 Tct is re...

Страница 36: ...define bits In ADCONR ADRUN 0x4 ADC is executed as the bit is set ADPD 0x3 Power Mode of ADC ORG 0 Initial address JMP INITIAL ORG 0x08 Interrupt vector User program CLR R_F To clear the ADCIF bit BS...

Страница 37: ...rrupt function is employed the following three lines may be ignored POLLING JBC ADCONR ADRUN To check the ADRUN bit continuously JMP POLLING ADRUN bit will be reset as the AD conversion is completed U...

Страница 38: ...L1H DL1L Fig 13 The Functional Block Diagram of the Dual PWMs Period Duty Cycle DT1 TMR1 PRD1 TMR1 Fig 14 The Output Timing of the PWM 2 Increment Timer Counter TMRX TMR1H TWR1L or TMR2H TWR2L TMRX ar...

Страница 39: ...latched from DTX to DLX while TMRX is cleared When DLX is equal to TMRX the PWMX pin is cleared DTX can be loaded at any time However it cannot be latched into DTL until the current value of DLX is eq...

Страница 40: ...T1P0 T1P1T1EN PRD2 Comparator TMR2X MUX Period Match T2P0 T2P1 T2EN To PWM1IF To PWM2IF reset reset 1 2 1 8 1 32 Fosc 1 64 1 2 1 8 1 32 Fosc 1 64 TMR1X TMR1H TMR1L TMR2X TMR2H TMR2L Fig 15 TMRX Block...

Страница 41: ...by writing IOCF0 if required 3 Load a desired value to PWMCON with the TMRX prescaler value and enable both TMRX and disable PWMX 4 10 Comparator EM78P458 459 has one comparator which has two analog...

Страница 42: ...er comparator RESET From OP I O Fig 17 The Output Configuration of a Comparator 3 Using as An Operation Amplifier The comparator can be used as an operation amplifier if a feedback resistor is connect...

Страница 43: ...2 OD1 OD0 Power on 1 1 1 1 1 1 1 1 RESET and WDT 1 1 1 1 1 1 1 1 N A IOCC0 Wake up from Pin Changed P P P P P P P P Bit Name PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0 Power on 1 1 1 1 1 1 1 1 RESET and WDT 1 1...

Страница 44: ...wer on 0 0 0 0 0 0 0 0 RESET and WDT 0 0 0 0 0 0 0 0 N A IOCD1 DL1H Wake up from Pin Changed 0 0 0 0 0 0 P P Bit Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Power on 0 0 0 0 0 0 0 0 RESET and WDT 0 0...

Страница 45: ...me X X X X X X Bit1 Bit0 Power on 0 0 0 0 0 0 0 0 RESET and WDT 0 0 0 0 0 0 0 0 0xC RC TMR1H Wake up from Pin Changed 0 0 0 0 0 0 P P Bit Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Power on 0 0 0 0...

Страница 46: ...External Clock Input In the most applications pin OSCI and pin OSCO can be connected with a crystal or ceramic resonator to generate oscillation Fig 19 depicts such circuit The same applies to the HXT...

Страница 47: ...0 30 32 768kHz 25 15 100KHz 25 25 LXT 200KHz 25 25 455KHz 20 40 20 150 1 0MHz 15 30 15 30 2 0MHz 15 15 Crystal Oscillator HXT 4 0MHz 15 15 OSCI 7404 XTAL 7404 7404 330 330 C EM78P458 EM78P459 Fig 20 C...

Страница 48: ...his range the frequency can be affected easily by noise humidity and leakage The smaller the Rext in the RC oscillator the faster its frequency will be On the contrary for very low Rext values for ins...

Страница 49: ...llation mode It is equipped with an internal capacitor and an external resistor connected to Vcc The internal capacitor functions as temperature compensator In order to obtain more accurate frequency...

Страница 50: ...hould be kept long enough to allow Vdd to reach minimum operation voltage This circuit is used when the power supply has a slow rise time Because the current leakage from the RESET pin is about 5 A it...

Страница 51: ...CODE OPTION EM78P458 459 has one CODE option word and one Customer ID word that are not a part of the normal program memory Word 0 Word 1 Bit12 Bit0 Bit12 Bit0 Code option12 0 Code option12 0 1 Code O...

Страница 52: ...P Power consumption selection 0 Low power 1 High power Bit 5 Bit 0 ID 5 ID 0 Customer s ID 2 Code Option Register Word 1 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit0 SIGN2 VOF2 2 VOF2 1 VOF2 0...

Страница 53: ...or 10 bit constant or literal value Table 16 The list of the instruction set of EM78P458 459 INSTRUCTION BINARY HEX MNEMONIC OPERATION STATUS AFFECTED 0 0000 0000 0000 0000 NOP No Operation None 0 000...

Страница 54: ...A skip if zero None 0 0111 11rr rrrr 07rr JZ R R 1 R skip if zero None 0 100b bbrr rrrr 0xxx BC R b 0 R b None Note2 0 101b bbrr rrrr 0xxx BS R b 1 R b None Note3 0 110b bbrr rrrr 0xxx JBC R b if R b...

Страница 55: ...iming CLKS 0 CLK TCC Ttcc Tins AC Testing Input is driven at 2 4V for logic 1 and 0 4V for logic 0 Timing measurements are made at 2 0V for logic 1 and 0 8V for logic 0 AC Test Input Output Waveform 2...

Страница 56: ...MAXIMUM RATINGS Items Rating Temperature under bias 0 C to 70 C Storage temperature 65 C to 150 C Input voltage 0 3V to 6 0V Output voltage 0 3V to 6 0V This specification is subject to change without...

Страница 57: ...Low Voltage VDD 3V OSCI 0 6 V VOH1 Output High Voltage Ports 5 6 IOH 12 0 mA 2 4 V VOL1 Output Low Voltage P51 P57 P60 P63 P66 P67 IOL 12 0 mA 0 4 V VOL2 Output Low Voltage P64 P65 IOL 16 0 mA 0 4 V I...

Страница 58: ...rror Vdd 2 5 to 5 5V Ta 25 0 0 5 0 9 LSB FSE Full scale error Vdd VAREF 5 0V VASS 0 0V 0 2 4 LSB OE Offset error Vdd VAREF 5 0V VASS 0 0V 0 1 2 LSB ZAI Recommended impedance of analog voltage source 0...

Страница 59: ...supply Rejection Ration for OP Vdd 5 0V VSS 0 0V 50 60 70 dB Vos Offset voltage Vdd 5 0V VSS 0 0V 10 20 mV Vs Operating range 2 5 5 5 V Note 1 These parameters are characterized but not tested 2 Thes...

Страница 60: ...TP MCU Package Type Pin Count Package Size EM78P458AP DIP 20 pin 300mil EM78P458AM SOP 20 pin 300mil EM78P459AK Skinny DIP 24 pin 300mil EM78P459AM SOP 24 pin 300mil This specification is subject to c...

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