Technical Information C23-SATA • PCIe to SATA RAID Controller Mezzanine Card
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CU-Series PHY Module
P-SP4
The on-board SIO (Super I/O controller) provides up to four serial interfaces (UART, DOS COM ports).
While three serial ports are assigned to RS-232 transceivers for front panel I/O, another UART is
available in addition from the optional pin header P-SP4 (TTL-level on all signals). P-SP4 is suitable for
attachment of an EKF CU-series PHY module via a micro ribbon flat cable assembly. A PHY module is
a transceiver from TTL level signals to a specific symmetric or asymmetric interface standard, e.g. EIA-
485 or RS-232E, with or w/o galvanic isolation. Please contact [email protected] for availability of different
CU-series modules (inquiries for custom specific PHY or transition modules welcome). Also custom
specific front panel design can be done.
Due to another (primary) SIO typically available on the CCG-RUMBA host board, the serial interfaces
are not necessarily assigned to COM-1/COM-4 by the operating system. Verify or modify the
accompanying CCG-RUMBA (or other CPU carrier board) BIOS settings for mapping of physical
asynchronous serial I/O ports to the logical COM port order.
Alternatively the connector P-SP4 can be used as 5V tolerant programmable I/O (GPIO). Details can be
derived from the SCH3114 Super I/O controller data sheet (www.smsc.com).
A special signal pair may be used as GPO for alternate purposes (not in use by default):
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SP4_DTR# can be configured (stuffing option) as SMBus EEPROM address line A1
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SP4_RTS# can be configured as SMBus EEPROM Write Protect WP
