Efinix Trion T120 BGA324, Руководство пользователя

Страница: 13 / 33

Trion T120 BGA324 Development Kit User Guide
Headers P4 and P6 (MIPI Receiver)
P4 and P6 are dedicated MIPI CSI-2 receiver high-speed interface connectors that support
1 clock lane and 4 data lanes. These headers also include optional supply pins VSUP1,
VSUP2, VSUP3, as well as five 1.8 V or 3.3 V GPIO pins (user selectable). You can use these
connectors to attach a camera connector daughter card.
Table 8: MIPI Receiver Channel 0 (P6) and Channel 1 (P4)
where x is 1 or 0
Pin
Number
Signal Name Description Pin
Number
Signal Name Description
1 VSUP1 Voltage supply 1 2 MIPI x _RXD_P0
3 VSUP2 Voltage supply 2 4 MIPI x _RXD_N0
Differential MIPI
Receiver Channel
Lane 0
5 GND Ground 6 GND Ground
7 NC 8 MIPI x _RXD_P1
9 NC
No Connect
10 MIPI x _RXD_N1
Differential MIPI
Receiver Channel
Lane 1
11 GND Ground 12 GND Ground
13 NC 14 MIPI x _RXD_P2
15 NC
No Connect
16 MIPI x _RXD_N2
Differential MIPI
Receiver Channel
Lane 2
17 GND Ground 18 GND Ground
19 NC 20 MIPI x _RXD_P3
21 NC
No Connect
22 MIPI x _RXD_N3
Differential MIPI
Receiver Channel
Lane 3
23 GND Ground 24 GND Ground
25 NC 26 MIPI x _RXD_P4
27 NC
No Connect
28 MIPI x _RXD_N4
Differential MIPI
Receiver Channel 0
Lane 4
29 GND Ground 30 GND Ground
31 NC 32 USER_SWITCH0 (P4)
PMOD_A_IO0 (P6) 1.8 or 3.3 V GPIO
33 NC
No Connect
34 USER_SWITCH1 (P4)
PMOD_A_IO1 (P6) 1.8 or 3.3 V GPIO
35 GND Ground 36 GND Ground
37 VSUP3 Voltage supply 3 38 USER_DIP0 (P4)
PMOD_A_IO2 (P6) 1.8 or 3.3 V GPIO
39 GPIOT_RXP16 (P4)
GPIOT_RXP15 (P6) 1.8 or 3.3 V GPIO 40 USER_DIP1 (P4)
PMOD_A_IO3 (P6) 1.8 or 3.3 V GPIO
www.efinixinc.com 13