14
EC-11User’s
Manual
03-32-00418-05
DALSA
Corp.
EXRCLK
EXRCLK is an optional input signal used to control readout timing. EXRCLK is applied to
the read portion of a FIFO and directly drives STROBE and LVAL. EXRCLK is required
for multisync operations.
EXSYNC (Triggers Line Readout)
EXSYNC is an optional input signal that can be used to trigger the line readout rate. This
camera uses the falling edge of EXSYNC to trigger line readout.
Note:
EXSYNC must not be clocked faster than the camera’s specified maximum line rate.
Notes on Free Run Mode
When the camera is powered on for the first time, it defaults (no external input required)
to free run mode (maximum data rate, forward direction, maximum line rate, and internal
Sync to trigger readout). Subsequently it will load user settings.
FORWARD
FORWARD is an optional input signal supporting bidirectional camera functionality.
“Logic high” for forward direction. “Logic low” for reverse. Eclipse defaults to “logic
high”, forward.
2.6 Data Bus
These signals indicate when data is valid, allowing you to clock the data from the camera
to your acquisition system:
Clocking Signal
Indicates
LVAL (high)
Outputting valid line
STROBE (rising edge)
Valid data
IMPORTANT:
This camera’s data should be sampled on the
rising
edge of STROBE.
Digital Data
The camera digitizes to 10-bit ADCs and outputs the most significant 8 bits in LVDS
format. To clock digital data into a frame grabber, the camera outputs clocking signals
STROBE and LVAL.
The camera digitizes internally to 10 bits and outputs the most significant 8 bits in LVDS
format on a MDR36F connector.
Test Pattern Pixels and End-of-line Sequence
To facilitate system-level debugging and verification of data path integrity, the camera
can generate both a test pattern and an end-of-line sequence.
See section 2.3 for
pinouts.
IMPORTANT:
This camera uses the
falling
edge of EXSYNC
to trigger line readout,
unlike previous DALSA
cameras, which used the
rising edge.
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