PCI 730 & PC104P-30 User Manual
Eagle Technology - Data Acquisition
A
A.Specifications
Analogue Input
Input Coupling
DC
Maximum Working Voltage
FIFO Buffer Size
Channel List Buffer Size
Maximum Sampling rate
Resolution
Relative Accuracy
External Trigger
±
11V relative to module ground
2048
Sixteen entries
100 KHz
Fourteen bits
±
1 LSB
From TTL input source
Analogue Output
Number of Channels
4
Output Range
±
10V @ 5mA
Resolution
14 Bits
Maximum update rate
840 ns per transfer to a DAC channel
Absolute Maximum Error
±
2mV
Digital I/O Characteristics
Number of Channels
24
Compatibility
82C55
I/O Characteristics
82C55
82C54 Counter Timer
Number of 82C54 devices
1
Gate Control
Jumper selectable either External IO or
Internal FPGA.
Clock Control
Jumper selectable either External IO or
Internal FPGA.
Other
Bus Interface
PCI 2.2 Compatible
Master & Slave
3.3V or 5V
Power Requirements
+5V (
±
5%) @ 1.3 A
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