e2v TSEV81102G0FS, Руководство пользователя

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TSEV81102G0FS Evaluation Board User Guide 5-1
0974C–BDC–02/09
e2v semiconductors SAS 2009
Section 5
Package Description
5.1 Pin Description
Table 5-1. Pin Description
Symbol Pin Number Description
Power Supplies
V
CC
5, 127 Positive 5V power supply
V
EE
1, 10, 16, 22, 28, 34, 40, 46, 58, 73, 92, 112,
123, 141, 155, 172, 189, 196
Negative -5V power supply
V
PLUSD
53, 61, 64, 69, 78, 83, 87, 95, 98, 101, 102,
106, 109, 115, 122, 126, 130, 133, 136, 144,
145, 148, 152, 160, 163, 167, 177, 181, 184,
193
Output buffer power supply
GND
2, 7, 13, 19, 25, 31, 37, 43, 49, 50, 99, 100,
118, 128, 146, 147
Ground
Analog Input Signals
DMUXDelAdjCtrl 194 In-phase DMUX clock delay cell control signal
DMUXDelAdjCtrlB 195 Inverted phase DMUX clock delay cell control signal
ADCDelAdjCtrl 47 In-phase stand-alone delay cell control signal
ADCDelAdjCtrlB 48 Inverted phase stand-alone delay cell control signal
SwiAdj 121 Swing adjust function control signal
DIODE 6 Die junction temperature monitoring signal
ECL Input Signals
ClkIn 21 In-phase input clock signal
ClkInB 20 Inverted phase input clock signal
I[0…9] 9, 12, 15, 18, 24, 27, 30, 33, 36, 39 In-phase input data
I[0…9]B 8, 11, 14, 17, 23, 26, 29, 32, 35, 38 Inverted phase input data
SyncReset 4 In-phase synchronous reset
SyncResetB 3 Inverted phase synchronous reset