EV8AQ160-DK
32
BDC- 1-Sep-10
e2v semiconductors SAS 2010
- Simultaneous channel mode = the analog input signal of channel A or B or C or D is send to
the 4 ADCs work at the same clock (4 ADC with the same timing) with Fclock/2 sampling rate
(where Fclock is the external clock signal frequency).
General setting:
o
DMUX mode = 1:1 or 1:2 output ratio;
Note: because of limitation of MSL605 evaluation board (LVDS max 1GHz in speed grade -1)
The capture of data QUAD 8bit at full speed must be done only in 1:2 Dmux mode.
The capture of data QUAD 8bit at in 1:1 Dmux mode could be done with Fclock lower than 2GHz.
o
Output mode = Gray coding or Binary coding;
o
Bandwidth selection = 600 MHz, 800 MHz, 1.5 GHz or 2.5 GHz band at -3dB;
o
Full scale mode = either 500 mVpp or 625 mVpp;
Standby setting:
o
No standby = all channels are active (A: ON, B: ON, C: ON, D: ON);
o
Partial standby = either A & B are in standby or C & D are in standby;
o
Full standby = all 4 ADCs are in standby.
Содержание EV8AQ160
Страница 49: ...EV8AQ160TPY DK 49 BDC 1 Sep 10 e2v semiconductors SAS 2010 INL Curve FFT spectrum...
Страница 63: ...EV8AQ160TPY DK 63 BDC 1 Sep 10 e2v semiconductors SAS 2010...
Страница 68: ...EV8AQ160 DK 68 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 41 Temperature sense and current measurement...
Страница 69: ...EV8AQ160TPY DK 69 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 42 FX2 microcontroller and ADC level shifting...
Страница 71: ...EV8AQ160TPY DK 71 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 44 Analog input configuration and SYNC signal...
Страница 72: ...EV8AQ160 DK 72 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 45 Output connector HPC port A and Port B...
Страница 73: ...EV8AQ160TPY DK 73 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 46 Clock configuration and PLL...
Страница 74: ...EV8AQ160 DK 74 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 47 Output connector HPC port C and Port D...
Страница 78: ...EV8AQ160 DK 78 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 53 internal Layer 5 Figure 54 internal Layer 6...
Страница 80: ...EV8AQ160 DK 80 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 57 internal Layer 9 Figure 58 internal Layer 10...