e2v AT84CS001-EB, Руководство пользователя

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Operating Characteristics
3-4 AT84CS001-EB Evaluation Kit User Guide
0904C–BDC–09/07
Notes: 1. Given for a differential input
2. Given for a 100
Ω
termination across true/false signals
3. Worst case value obtained with maximum supply voltages over full temperature range
Static Inputs (SLEEP, STAGG, BIST, RS, DAEN, CLKTYPE, DRTYPE)
Control Input Voltages :
- Logic low
- Logic high
R
IL
V
IL
R
IH
V
IL
0
10k
2.0V
10
0.5V
Infinite
Ω
Static Inputs (CLKDACTRL, DACTRL)
Control input voltages V
CCD
/3 2 × V
CCD
/3 V
Reset input (ASYNCRST)
Logic compatibility LVCMOS/CMOS
Control input voltages:
- Logic low
- Logic high
- Common mode
V
IL
V
IH
V
ICM
0
1.5
1.4
1.2
3.3
V
Table 3-3. Electrical Operating Characteristics (Continued)
Parameter Symbol Min Typ Max Unit
Table 3-4. Switching Performance and Characteristics
Parameter Symbol Min Typ Max Unit
Input Clock
Maximum clock frequency Fs max 1 1500 MHz
Minimum clock pulse width (high) TC1 0.3 0.333 500 ns
Minimum clock pulse width (low) TC2 0.3 0.333 500 ns
Output rise/fall time for data (20% -
80%)
TR/TF 400 ps
Output rise/fall time for Data Ready
(20% - 80%)
TR/TF 400 ps
Data output delay TOD 400 ps
Data Ready output delay TDR 400 ps
|TOD - TDR| 0 ps