Embedded Solutions
Page 14
VPX Module J0 Power assignments
Signal
J0
GND
A4, A5, A6, A8, B8, C7, D4, D5, D6, D7, E8, F4, F5, F6, F8, G7, H7, I4, I5, I6, I8
12V
F1, F2, G1, G2, H1, H2, I1, I2
3.3V
A1, A2, B1, B2, C1, C2, D1, D2
5V
A3, B3, C3, D3, F3, G3, H3, I3
3.3V AUX
E5
M12 AUX
OPEN
P12AUX
OPEN
PERST#
C4
FIGURE 4
PCIE8LSWVPX3U POWER/J0
Note: 3.3V Aux is routed to PCIe 3.3V Aux and will be powered from PC power supply
as defined by your PC. PERST# is the PCIe reset signal and is also routed to this
connector. Global addressing and JTAG pin definitions shown in the header/switch
section of this manual.
