Dynamic Engineering PCIe 8L XMC X1, Руководство пользователя

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Embedded Solutions Page 9
XMC Module Backplane IO Interface Pin Assignment
The figure below gives the pin assignments for the XMC Module IO Interface – from
Pn4 to the PCIe8LXMCX1connectors. Also see the User Manual for your XMC board for
more information. Please note that P2 or P3, P4 or P5 are installed not both.
DIN IDC [P13] SCSI II [P2] Pn4
A1 C1 1 35 3 1
A2 C2 2 36 4 2
A3 C3 3 37 7 5
A4 C4 4 38 8 6
A5 C5 5 39 11 9
A6 C6 6 40 12 10
A7 C7 7 41 15 13
A8 C8 8 42 16 14
A9 C9 9 43 19 17
A10 C10 10 44 20 18
A11 C11 11 45 23 21
A12 C12 12 46 24 22
A13 C13 13 47 27 25
A14 C14 14 48 28 26
A15 C15 15 49 31 29
A16 C16 16 50 32 30
A17 C17 17 51 35 33
A18 C18 18 52 36 34
A19 C19 19 53 39 37
A20 C20 20 54 40 38
A21 C21 21 55 43 41
A22 C22 22 56 44 42
A23 C23 23 57 47 45
A24 C24 24 58 48 46
A25 C25 25 59 51 49
A26 C26 26 60 52 50
A27 C27 27 61 55 53
A28 C28 28 62 56 54
A29 C29 29 63 59 57
A30 C30 30 64 60 58
A31 C31 31 65 63 61
A32 C32 32 66 64 62
33 67 Open, +3 or GND via J2,19 silk screen defined
34 68 Open, +3 or GND via J3,20
FIGURE 1 PCIE8LXMCX1 PN4 INTERFACE STANDARD
Read table:
P13-C1 = P2-35 = Pn4-1
P13-A1 = P2-1 = Pn4-3
etc.