DYNAMIC SOUNDS ASSOCIATES Phono III
Page 19 of 38
USER MANUAL
AC power supply noise which has a “noise floor” plus minor noise spikes at harmonics of 60Hz,
External interference that is picked up and amplified by the
Phono III
,
Semiconductor and component noise from the internal circuitry.
To suppress the AC power supply noise, the
Phono III
uses two matched shielded toroidal transformers,
whose primaries are driven out of phase from each other. These transformers are also encased in a
separate magnetically shielded housing to provide virtually total cancellation of residual AC fields within
the
Phono III
chassis. The dual power supplies are highly regulated and filtered to ensure that the
voltages going to the amplifier boards are free of AC noise and harmonics of 60Hz. The use of individual
low noise voltage regulators for each gain stage further reduces the AC noise to levels that are almost
unmeasurable.
External noise is suppressed by having the
Phono III
enclosure designed as a “Faraday cage,” a fully
conducting metal cage that is connected directly to the AC ground. The individual panels of the Phono II
chassis have the black anodizing removed on the inside surface where required to ensure that all panels
are electrically connected for isolation. In addition, the
Phono III
uses an internal RFI filter on the AC
power line to eliminate residual power line interference that might enter via that pathway.
Internally generated noise from the amplifier components is the dominant source of wideband output
noise in the
Phono III
. However, due to both the design topology, and the use of ultra-low noise,
discrete designs for the voltage regulators and constant current sources for each gain stage, the overall
noise level at the output is very low. First, any residual internal noise generated by the voltage
regulators or constant current sources for stages 1 and 3 is eliminated by the balanced connection of
these stages to stages 2 and 4, respectively. This leaves stage 2 as the only significant noise source since
any residual noise generated in stage 4 has no further amplification and will be dominated by any noise
from the preceding stages.
All gain stages use ultra-low voltage regulators having ≈ 20nV/Hz
1/2
of voltage noise at their respective
outputs, and the constant current sources for stages 2 and 4 have ≈ 20pA/Hz
1/2
of current noise at the
required bias current levels.
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However, just as the total bias current is split equally between the two
sides of the balanced stage, this noise current is also equally split. Randomly generated, or
“uncorrelated”, noise generated by the components within the gain stages is not suppressed by the
balanced connection to stages 2 and 4; but, through the use of ultra-low noise devices for the gain
stages, analysis and measurements have shown that this noise is significantly less than any “common
mode” noise.
In addition to designing very low noise gain stages, internally generated noise is further suppressed by
the RIAA (or other) playback equalization.
Figure 8
shows the un-weighted noise voltage spectral
density (V/Hz
1/2
) for the
Phono III
at 40dB, 50dB and 60dB gain, as measured
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at the single ended
output and with the input shorted. All curves are for the left channel, with identical results for the right
channel.
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Analysis and measurements have shown that constant current noise is the major source of noise within each gain
stage since it is multiplied by the drain resistance for each amplifier stage.
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