DLS DLS 400A, Руководство по эксплуатации

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REMOTE CONTROL: COMMON COMMAND SET
IEE E
R S 232C
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bit 6: MSS/RQS (Master Summary Status/Request Service)
MSS is raised when either MAV or ESB are raised and enabled. When
the status of MSS changes, the whole Status Byte Register is copied into
the Status Byte of the GPIB controller, where bit 6 is called RQS. When
RQS goes high so does the SRQ line, and in response to an IEEE 488.1
Serial Poll command, both are cleared.
RQS and SRQ are defined by the IEEE 488.1 standard and are hardware
related. MSS summarizes all the status bits of the DLS 400, as defined
by the IEEE 488.2 standard.
bits 7, 3, 2, 1,and 0
These bits are not used by the DLS 400.
8.1.2 Event Status Register (ESR)
The Event Status Register monitors events within the system and reports on those enabled.
It records transitory events as well. The DLS 400 implements only the IEEE 488.2 Stand-
ard Event Status Register (ESR). It is defined as:
bit 0 Operation Complete. This bit is set in response to the *OPC command when the
current operation is complete.
bit 1 Request Control. The DLS 400 does not have the ability to control the IEEE bus,
and so this bit is always 0.
bit 2 Query Error. There was an attempt to read an empty output queue or there was an
output queue overflow. (maximum output queue capacity is 75 bytes).
bit 3 Device Dependent Error. This error bit is set when the DLS 400 receive a com-
mand to set the length of a fixed loop. Only variable loops can have their length
changed.
bit 4 Execution Error. The data associated with a command was out of range.