Spectrum Digital, Inc
2-3
2.1.2 CPLD Registers
The multiple CPLD memory-mapped registers allows users to control CPLD functions
in software. On theC6413/C6418 EVM the registers are primarily used to access the
LEDs and DIP switches, provide LCD interface, and control the daughter card interface.
The registers are mapped into the EMIF data space at word address 0x900F010, in the
upper portion of CE1. They appear as 8-bit registers with a simple 8-bit asynchronous
memory interface. The following table gives a high level overview of the CPLD
registers and their bit fields:
The table below shows the bit definitions for the 7 registers in CPLD.
Table 1: CPLD Register Definitions
Offset
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
USER_REG
USR_SW3
R
USR_SW2
R
USR_SW1
R
USR_SW0
R
USR_LED3
R/W
0(Off)
USR_LED2
R/W
0(Off)
USR_LED1
R/W
0(Off)
USR_LED0
R/W
0(Off)
1
DC_REG
DC_DET
R
Reserved
DC_STAT1
R
DC_STAT0
R
DC_RST
R
0(No reset)
0
DC_CNTL1
R/W
0(low)
DC_CNTL0
R/W
0(low)
2
Reserved
3
Reserved
4
VERSION
CPLD_VER[3.0]
R
0
BOARD VERSION[2.0]
R
5
Reserved
6
MISC
McBSP0
On/Off
R/W
0
(Onboard)
Reserved
Reserved
Reserved
Reserved
Reserved
McBSP2
ON/OFF
Board
R/W
0
(Onboard)
McBSP1
ON/OFF
Board
R/W
0
(Onboard)
7
Reserved
8
LCD_REG0
SHIFT
DATA7
SHIFT
DATA6
SHIFT
DATA5
SHIFT
DATA4
SHIFT
DATA3
SHIFT
DATA2
SHIFT
DATA1
SHIFT
DATA0
9
LCD_REG1
SHIFT
DATA7
SHIFT
DATA6
SHIFT
DATA5
SHIFT
DATA4
SHIFT
DATA3
SHIFT
DATA2
SHIFT
DATA1
SHIFT
DATA0
A
BOARD
LCD Busy
R
1 BUSY
LCD Reset
R/W
0
Reserved
R
Reserved
R
SBRAM
Enable
R/W
(0 Disabled)
Expansion
I
2
C Port 1
R/W
(0 Off)
Expansion
I
2
C Port 0
R/W
(0 Off)
Reserved
Содержание TMS320C6413
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