22.8.2018
Cmod S7 Reference Manual [Reference.Digilentinc]
https://reference.digilentinc.com/reference/programmable-logic/cmod-s7/reference-manual
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3,650 slices containing four 6-input LUTs and 8 flip-flops
1,620 Kbits of fast block RAM ()
3 clock management tiles, each with a phase-locked loop and mixed-mode clock manager
80 DSP slices
Internal clock speeds exceeding 450 MHz ()
On-chip analog-to-digital converter (XADC)
Programmable over JTAG and Quad-SPI Flash
Memory
4 MB () Quad-SPI Flash
Power
Powered from USB or 5V external supply connected to DIP pin 24
USB
USB-JTAG programming circuitry
USB-UART bridge
Push-buttons and LEDs
2 Buttons
4 LEDs
1 RGB LED ()
Expansion Connectors
1 Pmod connector
8 total FPGA I/O
48-pin DIP form-factor header
32 total FPGA I/O
2 single-ended 0-3.3V analog inputs to XADC
2 power pins
Callout
Description
Callout
Description
1
48-pin DIP form factor header
7
UART status LED ()
2
FPGA programming DONE LED ()
8
Shared USB JTAG/UART port
3
Pmod connector
9
Power good LED ()
4
User push buttons
10
Spartan-7 FPGA
5
User LEDs
11
SPI Flash
6
User tri-color LED ()
The Cmod S7 is fully compatible with the high-performance Vivado ® Design Suite versions 2018.1 and newer. It is supported under the
free WebPACK™ installation option, which does not require a license, so designs can be implemented at no additional cost. This free
installation includes the ability to create MicroBlaze™ soft-core processor designs. Design resources, example projects, and tutorials are
Software Support
