IO
M
U
X
E
xt
er
n
a
ls
ig
n
a
ls
a
n
d
p
in
m
u
lti
p
le
xin
g
C
o
n
n
ec
tC
o
re
®
8X
S
ys
te
m
-o
n
-M
o
d
u
le
H
a
rd
w
a
re
R
ef
er
en
ce
M
a
n
u
a
l
5
9
Castellated
pad #
Associated
LGA Pad
name
ConnectCore 8X
signal name
i.MX 8X pin name*
Multiplexing
Power group
Comments
100
A20
ENET0_RGMII_TXD2
ENET0_RGMII_TXD2
ALT0:
ENET0_RGMII_TXD2
ALT1:
MLB_CLK
ALT2:
NAND_CE0_B
ALT3:
USDHC1_CD_B
ALT4:
GPIO5_IO01
VDD_ENET0
101
A19
ENET0_RGMII_TXD3
ENET0_RGMII_TXD3
ALT0:
ENET0_RGMII_TXD3
ALT1:
MLB_SIG
ALT2:
NAND_RE_B
ALT3:
ALT4:
GPIO5_IO02
VDD_ENET0
102
A18
ENET0_RGMII_RXC
ENET0_RGMII_RXC
ALT0:
ENET0_RGMII_RXC
ALT1:
MLB_DATA
ALT2:
NAND_WE_B
ALT3:
USDHC1_CLK
ALT4:
GPIO5_IO03
VDD_ENET0
103
A17
ENET0_RGMII_RX_
CTL
ENET0_RGMII_RX_CTL
ALT0:
ENET0_RGMII_RX_CTL
ALT1:
ALT2:
ALT3:
USDHC1_CMD
ALT4:
GPIO5_IO04
VDD_ENET0
104
A16
ENET0_RGMII_RXD0
ENET0_RGMII_RXD0
ALT0:
ENET0_RGMII_RXD0
ALT1:
ALT2:
ALT3:
USDHC1_DATA0
ALT4:
GPIO5_IO05
VDD_ENET0
105
A15
ENET0_RGMII_RXD1
ENET0_RGMII_RXD1
ALT0:
ENET0_RGMII_RXD1
ALT1:
ALT2:
ALT3:
USDHC1_DATA1
ALT4:
GPIO5_IO06
VDD_ENET0