2.1.5. TVT Part
Table 2–12: Undocumented XDFP Registers (already available in Dx versions)
Name
Sub
Dir
Sync
Reset
Range
Function
Horizontal Deflection
PER_MIN[10:0]
hF2
h0183[10:0]
RW
1140
0..2047
HSync Period Minimum
PER_MAX[10:0]
hF2
h0184[10:0]
RW
1426
0..2047
HSync Period Maximum
Table 2–13: Wrongly Documented TVT Registers
Name
Addr
Dir
Reset
Range
Function
RTC
RTCRW
h8F[4]
RW
0
0,1
RTC Read/Write
RTCSUB[3:0]
h8F[3:0]
RW
0
0..15
RTC Subaddress
MEMORY
INTSRC0
hE8[5]
RW
0
0,1
Interrupt 0 Source
0: Int0 is source
1: CRT is source
INTSRC1
hE8[4]
RW
0
0,1
Interrupt 1 Source
0: Int1 is source
1: CRT is source
PATCH
hE8[3]
RW
0
0,1
Patch Modul
0: enable
1: disable
CIRCUIT DESCRIPTIONS