Osbourne User Manual V0.21
Page 13
4 FUNCTIONAL BLOCK DIAGRAM
4.1 Baseboard Block Diagram
The following Block Diagram illustrates the key functional blocks of the baseboard with integrated NVIDIA AGX
Orin Series Module.
Osbourne Block Diagram
Jetson AGX Orin
R0p21
Level
Shifter
UART 1
S
o
C
HDMI_DP2_TXx
USB2.0 Port 0
UPHY0 Lane 1
USB2.0 Port 1
UPHY0 Lane 2
UPHY2 Lane 4
(MGBE C0)
XFI0 MDC/MDIO
10GbE
PHY
M.2, Key E Socket
Wi-Fi Data IF
BT Audio
BT IF
Power
Regs
Camera
Expansion
Connector
Misc Control
Camera
LPDDR5
eMMC 5.1
M.2, Key M Socket
NVME
Misc Control IF
I/O
co
n
n
ect
or
b
oa
rd
co
n
n
ect
or
USB2.0
Hub
USB3.2 (P2)
USB3.2 (P1)
MGBE Port 0
FAN Control
Minicard
Socket 2
Secure SPI NOR
Thermal Sensor
I2S1
I2C1
CAN 0
CAN 1
GPIO
Exp
8x DIO
CAN
TXR
Audio
Codec
USB2 (Hub)
Common
Configuration #1 Only
Configuration #2 Only
FAN Connector
RGMII
RGMII
Adapter
MDI
USB3.2 (P0)
USB2.0 Port 2
USB2 (Hub)
UART 9
UART 2
UART 5 (muxed)
SP336
I2C 4
SP3243
Power
Ckts
PMIC_BBAT
X16 PCIe
Right angle
Socket
Nano SIM
Socket
UPHY0 Lane 0
PEX_CLK_C1 (C0)
MUX
2:1
SPI 1
XFI0 INT/RST
I2C5
MCLK01
Reset
Power On
Force Recovery
I2C2
I2C5
CSI[7:0]
MCLK[04:02]
CAM Ctrl
UPHY1 Lane 0
PEX_CLK5 (C5)
PCIe Control
UPHY0 Lanes [7:4]
PEX_CLK4 (C4)
PCIe Control
I2C2
UPHY2 Lane 0
PEX_CLK0 (C7)
PCIe Control
USB2.0 Port 3
UART5 (muxed)
I2S1
SDIO
UPHY0 Lane 3
PEX_CLK 6 (C1)
PCIe Control
SYS_VIN_HV
SYS_VIN_MV
CONFIG SEL
CAN
TXR
Minicard
Socket 1
MUX
1:2
CARD SEL
UPHY1 Lanes [7:1]
I2C3
Figure 4-1: Baseboard Functional Block Diagram