DFI Infinity NF series, Руководство пользователя

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102
3
BIOS Setup
CAS# Latency (Tcl)
This field is used to select the clock cycle of the CAS latency time.
The option selected specifies the timing delay before SDRAM starts
a read command after receiving it.
DDR II Timing Item
The options are Enabled and Disabled.
TwTr Command Delay
The options are Reserved, 1 bus clock, 2 bus clocks and 3 bus
clocks.
Trfc0 for DIMM0, Trfc1 for DIMM1, Trfc2 for DIMM2 and Trfc3 for
DIMM3
These fields are used to select the auto refresh cycle time.
(Twr) Write Recovery Time
This field is used to select the write recovery time when the DRAM
safely registers the last write data. This is the time from the last write
data to precharge.
(Trtp) Precharge Time
This field is used to select the precharge time.
(Trc) Row Cycle Time
This field is used to select the row cycle time, RAS# active or auto
refresh of the same bank.
(Trcd) RAS to CAS R/W Delay
When DRAM refreshes, both rows and columns are addressed
separately. This field is used to select the delay time from RAS (Row
Address Strobe) to CAS (Column Address Strobe) when reading
and writing to the same bank. The lesser the clock cycle, the faster
the DRAM’s performance.