36
ROM PCI/ISA BIOS
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration
DRAM Speed Selection
DRAM RAS# Precharge Time
MA Additional Wait State
RAS# To CAS# Delay
DRAM Read Burst (B/E/F)
DRAM Write Burst (B/E/F)
ISA Bus Clock
DRAM Fast Leadoff
DRAM Refresh Queue
DRAM RAS Only Refresh
DRAM ECC/Parity Select
Fast DRAM Refresh
Read-Around-Write
PCI Burst Write Combine
PCI-To-DRAM Pipeline
CPU-To-PCI Write Post
CPU-To-PCI IDE Posting
: Enabled
: 70ns
: 4
: Disabled
: Enabled
: x2/3/4
: x3/3/3
: PCICLK/4
: Disabled
: Enabled
: Disabled
: Disabled
: Disabled
: Enabled
: Enabled
: Enabled
: Enabled
: Enabled
System BIOS Cacheable
Video BIOS Cacheable
8 Bit I/O Recovery Time
16 Bit I/O Recovery Time
Memory Hole At 15M-16M
: Disabled
: Enabled
: 4
: 2
: Disabled
ESC
F1
F5
F6
F7
: Quit
: Help
: Old Values
: Load BIOS Defaults
: Load Setup Defaults
PU/PD/+/-
(Shift) F2
: Select Item
: Modify
: Color
↑ ↓ → ←
Auto Configuration
Enabled
Disabled
The system will set the “DRAM Speed Selection” to the “ISA
Bus Clock” categories automatically.
This allows you to set the “DRAM Speed Selection” to the
“ISA Bus Clock” categories manually.
DRAM ECC/Parity Select
Enables the memory parity check. If the system DRAM has no
parity bit, the system will display “RAM parity error”.
The system will ignore the memory parity check even if the
DRAM has no parity bit and the system will not display “RAM
parity error”.
Enables the ECC (Error Correction Code) function.
Parity
Disabled
ECC
ISA Bus Clock
When using 150MHz or 180MHz CPU, the ISA bus clock is
7.5MHz. When using 166MHz or 200MHz, the ISA bus clock
is 8.25MHz.
When using 150MHz or 180MHz CPU, the ISA bus clock is
10MHz. When using 166MHz or 200MHz, the ISA bus clock
is 11MHz.
PCICLK/4
PCICLK/3
Warning:
We recommend that you set the ISA Bus Clock category to “PCICLK/4”.
Compatibility problem with some ISA cards may occur if set at “PCICLK/3”.
Содержание G686IPA
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