5
5
DVD-310
24
RESET#
I
Reset input, active low.
25
TDMDX
O
TDM transmit data.
28
TDMDR
I
TDM receive data.
29
TDMCLK
I
TDM clock input.
30
TDMFS
I
TDM frame sync.
31
TDMTSC#
O
TDM output enable.
TWS
O
Audio transmit frame sync.
SEL_PLL2
I
System and DSCK output clock frequency selection is made at the rising edge of RESET#.
The matrix below lists the available clock frequencies and their respective PLL bit settings.
SEL_PLL2
SEL_PLL1
SEL_PLL0
Clock Type
0
0
0
VCO off.
0
0
1
DCLK
32
0
1
0
Bypass mode
0
1
1
DCLK x 2
1
0
0
DCLK x 4.5
1
0
1
DCLK x 3
1
1
0
DCLK x 3.5z
1
1
1
DCLK x 4
33
TSD0
O
Audio transmit serial data port 0.
SEL_PLL0
I
Refer to the description and matrix for SEL_PLL2 pin 32.
36
TSD1
O
Audio transmit serial data port 1.
SEL_PLL1
I
Refer to the description and matrix for SEL_PLL2 pin 32.
37
TSD[2]
O
Audio transmit serial data output 2.
38
TSD[3]
O
Audio transmit serial data output 3.
39
MCLK
I/O
Audio master clock for audio DAC.
40
TBCK
O
Audio transmit bit clock.
SPDIF
O
S/PDIF output.
SEL_PLL3
I
Clock source select.
41
SEL_PLL3
Clock Source
0
Crystal oscillator
1
DCLK input
42,48
NC
No connect pins. Leave open.
45
RSD
I
Audio receive serial data.
46
RWS
I
Audio receive frame sync.
47
RBCK
I
Audio receive bit clock.
49
XIN
I
Crystal input.
50
XOUT
O
Crystal output.
51
AVEE
I
Analog power for PLL.
66:61, 58:53
DMA[11:0]
O
DRAM address bus [11:0]
69
DCAS#
O
DRAM column address strobe,
70
DSCK_EN
O
DRAM clock enable.
71
DWE#
O
DRAM write enable.
72
DRAS#
O
DRAM row address strobe.
73
DMBS0
O
SDRAM bank select 0.
74
DMBS1
O
SDRAM bank select 1.
96:93, 90:85,
82:77
DB[15:0]
I/O
DRAM data bus [15:0]
97, 100
DCS[1:0]#
O
SDRAM chip select [1:0]
101
DQM
O
Data input/output mask.
102
DSCK
O
Output clock to SDRAM.
105
DCLK
I
27 MHz clock input to PLL.
106
UDAC
O
Video UDAC
output.
107
VREF
I
Internal voltage to video DAC.
108
CDAC
O
Video CDAC output.
109
COMP I Compensation input.
110
RSET
I DAC current adjustment resistor input.
111
ADVEE
I
Analog power for video DAC.
113
Y
DAC
O
Video YDAC output.
Function
I/O
Pin No.
Pin Name
Содержание DVD-310
Страница 3: ...3 3 DVD 310 BLOCK DIAGRAM ...
Страница 22: ...22 22 DVD 310 FL DISPLAY HNV06SC15T F901 PIN CONNECTION GRID ASSIGNMENT 31 1 ...
Страница 23: ...23 23 DVD 310 ANODE CONNECTION ...
Страница 24: ...24 24 DVD 310 CUP11607Z A V UNIT ASS Y COMPONENT SIDE CUP11607Z A V UNIT ASS Y FOIL SIDE PRINTED WIRING BOARD ...
Страница 25: ...25 25 DVD 310 CUP11608Z FRONT UNIT ASS Y COMPONENT SIDE CUP11608Z FRONT UNIT ASS Y FOIL SIDE ...
Страница 26: ...26 26 DVD 310 RL S871 MECHANISM UNIT ASS Y COMPONENT SIDE RL S871 MECHANISM UNIT ASS Y FOIL SIDE ...
Страница 27: ...27 27 DVD 310 CUP11609Z SMPS UNIT ASS Y COMPONENT SIDE CUP11609Z SMPS UNIT ASS Y FOIL SIDE ...
Страница 41: ...41 41 DVD 310 WIRING DIAGRAM ...