Denon DN-A7100 - AV Surround Preamplifier, Руководство по обслуживанию

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88
N o . S Y M B O L I/O F U N C T I O N
5 7 V
D D
- P o w e r S o u r c e : V
D D
= + 3 . 0 t o 5 . 5 V
4 9 V
S S
- G N D : V
S S
= 0 V
4 8 V
F D P
-
V F D D r i v i n g P o w e r S o u r s e
V
D D
- 2 0 V t o V
D D
- 4 5 V
5 0 O S C
1
I
C R O s c i l l a t i o n T e r m i n a l
E x t e r n a l R a n d C c o n n e c t t o t h e s e t e r m i n a l s .
(Target f
O S C
= 3 6 0 k H z )
5 1 O S C
2
O
5 4 C L K I
S e r i a l C l o c k I n p u t T e r m i n a l
T h e s e r i a l d a t a i n p u t s y n c h r o n i z i n g t h e r i s e e d g e o f t h i s
terminal.
5 3 C S I
C h i p S e l e c t T e r m i n a l
W h e n t h e C S t e r m i n a l i s " H " t h e s e r i a l d a t a i n p u t i s n o t
a v a i l a b l e .
5 5 S I I
S e r i a l D a t a I n p u t T e r m i n a l
T h e d a t a i n p u t i s M S B f i r s t .
5 6 R S I
R e g i s t e r S e l e c t i o n S i g n a l I n p u t T e r m i n a l
R S = " 0 " : I n s t r u c t i o n R e g i s t e r
R S = " 1 " : D a t a R e g i s t e r
5 2 R S T I
R e s e t T e r m i n a l R S T = " L " : R e s e t
- E a c h A d d r e s s
- E a c h R A M D a t a
- D i s p l a y D i g i t s
- C o n t r a s t C o n t r o l
-All Display Off
- A l l O u t p u t s a r e " L " : ( 0 0 )
H
: Unfixed
: 1 6 - d i g i t
: 8/16 Dury
6 1 t o 6 4 ,
1 t o 3 1
S
1
to S
3 5
O
Segment Output Terminals (Internal Pull-down
R e s i s t a n c e )
3 2 t o 4 7 T
1
to T
1 6
O Timing Output Terminals (Internal Pull-down Resistance)
6 0
5 9 M K
1
M K
2
O Icon Output Terminals (Internal Pull-down Resistance)
5 8 P
1
O
O u t p u t P o r t T e r m i n a l
T h i s t e r m i n a l i s s u i t a b l e f o r L E D .
SI
CS
C L K
R S
V
S S
OSC
1
OSC
2
V
D D
R S T
V
F DP
M K
1
~ M K
2
S
1
~ S
35
P
1
T
1
~
T
1 6
8bits
Shift
R e g .
Instruction
D ec oder
Timing
Gen.
C R
OSC .
State
Reg.
Di s p la y
Control
Address
Selector
Read
Address
Counter
L i n e
Address
Counter
Timing
D r i v e r
D D R A M
1 6 x 8 bit
C G R O M
8 , 4 0 0 b i t
Port
D r i v e r
C G R A M
3 5 x 8 bit
Segment
D r i v e r
M K R A M
1 6 x 2 bit
Icon
D r i v e r
R ESET
IC81 : NJU3430F