30
DHT-500SD
TNY266 (SM:IC81)
KA1M0565R (SM:IC95)
EN/UV
D
S
S
S (HV RTN)
S (HV RTN)
BP
8
5
7
1
4
2
3
CLOCK
OSCILLATOR
5.8 V
4.8 V
SOURCE
(S)
S
R
Q
DCMAX
BYPASS
(BP)
+
-
VI
LIMIT
FAULT
PRESENT
CURRENT LIMIT
COMPARATOR
ENABLE
LEADING
EDGE
BLANKING
THERMAL
SHUTDOWN
+
-
DRAIN
(D)
REGULATOR
5.8 V
BYPASS PIN
UNDER-VOLTAGE
1.0 V + VT
ENABLE/
UNDER-
VOLTAGE
(EN/UV)
Q
240
∝
A
50
∝
A
LINE UNDER-VOLTAGE
RESET
AUTO-
RESTART
COUNTER
JITTER
1.0 V
6.3 V
CURRENT
LIMIT STATE
MACHINE
1. GND 2. DRAIN 3. V
CC
4. FB
1 2 3 4
5ı A
9V
2.5R
1R
1mA
0.1V
+
ˇ
OVER VOLTAGE S/D
+
ˇ
7.5V
25V
Thermal S/D
S
R
Q
Power on reset
+
ˇ
L.E.B
S
R
Q
OSC
5V
Vref
Internal
bias
Good
logic
SFET
#2 DRAIN
#1 GND
#4 FB
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