TPS563200 (DIGITAL_DIGITAL SUPPLY : IC741~745, 747)
Terminal Functions
PIN
DESCRIPTION
NAME
NUMBER
GND
1
Ground pin Source terminal of low-side power NFET as well as the ground ter-
minal for controller circuit. Connect sensitive VFB to this GND at a single point.
SW
2
Switch node connection between high-side NFET and low-side NFET.
VIN
3
Input voltage supply pin. The drain terminal of high-side power NFET.
VFB
4
Converter feedback input. Connect to output voltage with feedback resistor
divider.
EN
5
Enable input control. Active high and must be pulled up to enable the device.
VBST
6
Supply input for the high-side NFET gate drive circuit. Connect a 0.1 μ F ca-
pacitor between VBST and SW pins.
Block diagram
SW
VBST
VFB
GND
2
3
1
EN
4
6
5
VIN
TPS562200, TPS563200
DDC (SOT) Package
Top View
2 SW
ZC
XCON
PWM
Control Logic
+
+
+
UVP
OVP
3
VIN
Ton
One-Shot
6 VBST
+
4
VFB
OCL
+
+
Soft Start
5
EN
HS
LS
1 GND
SS
Voltage
Reference
Ref
Hiccup
V
UVP
V
OVP
OCL
threshold
Regulator
UVLO
VREG5
VREG5
TSD
R5F56108VNFP (DIGITAL_MCU : IC751)
R5F56108VNFP Terminal Functions
Pin
Pin Name
Symbol
I/O
Pu/Pd STBY STOP CEC
STBY Function
1
P04/IRQ12-A/
TMCI3/TxD4/TDI
TDI/TXD MITSUBI-
SHI/NC(NORMRAL)
I/O/I
M3VPu -/-/I -/-/I
I
E20 Emulator control pin/Mitsubishi writter control
pin/When normal operating mode,set to input.
2
P03/IRQ11-A/
TMRI3/SCK4/TMS TMS/NC(NORMRAL)
I/I
M3VPu
-/I
-/I
I
E20 Emulator control pin/When normal operating
mode,set to input.
3
P67/DA1
HIN SELA
O
L
L
L
HDMI +5V selector (TC4051) control pin
4
P66/DA0
HIN SELB
O
L
L
L
HDMI +5V selector (TC4051) control pin
5
AVSS
AVSS
-
-
-
-
Ground pin
6
P02/IRQ10-A/
TMO2/SCK6/TRST#
TRST#/
NC(NORMRAL)
I/I
Pd
I/I
I/I
I
E20 Emulator control pin/When normal operating
mode is set to input.
7 P01/IRQ9-A/TMCI2/
RxD6
RXD MI232O
I
M3VPu
I
I
I
External data input port (for AMX/FW update via
232C) :Connector is FFC
8 P00/IRQ8-A/TMRI2/
TxD6
TXD MO232I
O
L
L
L
External data output port (for AMX/FW update via
232C) :Connector is FFC
9
P65/IRQ15-A
POWER KEY
I
M3VPu
I
I
I
Detect Power switch (Release from Wait Mode,Set
to interrupt)
10
EMLE
EMLE
I
Pd
-
-
-
E20 Emulator control pin (On chip Emulator is
used,this pin should be High. Not used,it should be
Low)
11
WDTOVF#/TDO
TDO/WDTOVF#
O/O
-
-
-
E20 Emulator control pin
12
VSS
VSS
I
-
-
-
Ground pin
13
MDE
MDE
I
Pd
-
-
-
Pins for setting the operating mode (Little
Edian:MDE=Low)
14
VCL
VCL
I
-
-
-
Smoothing capacitor connection pin
RX610 GROUP
PLQP0144KA-A
（
144pin LQFP
）
(Top View)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
10
8
10
7
10
6
10
5
10
4
10
3
10
2
10
1
10
0
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
PE0/D8
PD6/D6
PD5/D5
PD4/D4
P64/CS4#-B
P63/CS3#-A/CS7#-A
P62/CS2#-A/CS6#-A
P61/CS1#/CS2#-B/CS5#-A/CS6#-B/CS7#-B
P60/CS0#/CS4#-A/CS5#-B
PD3/D3
PD2/D2
PD1/D1
PD0/D0
P96/AN14
P95/AN13
P94/AN12
P93/AN11
P92/AN10
P91/AN9
VSS
P90/AN8
VCC
P47/AN7/IRQ15-B
P46/AN6/IRQ14-B
P45/AN5/IRQ13-B
P44/AN4/IRQ12-B
P43/AN3/IRQ11-B
P42/AN2/IRQ10-B
P41/AN1/IRQ9-B
VREFL
P40/AN0/IRQ8-B
VREFH
P05/TMO3/RxD4/IRQ13-A/TCK
PD7/D7
P97/AN15
AVCC
PC4/A20
PC6/A22/RxD5/CS6#-D
PC7/A23/TxD5/CS4#-D/CS7#-D
P75
P76/IRQ14-A
P77
P50/WR0#/WR#
P51/WR1#/BC1#
P52/RD#
P53/BCLK
P80
P81/TRSYNC
VCC
VSS
P83
P54/TRDATA0
P55/TRDATA1
P56/TRDATA2
P57/WAIT#/TRDATA3
P84
P35/PO13/TIOCA1/TIOCB1/TCLKC-A
P36/PO14/TIOCA2
P37/PO15/TIOCA2/TIOCB2/TCLKD-A
P10/IRQ0-B
P11/SCK2/IRQ1-B
P12/RxD2/IRQ2-B
P13/TxD2/ADTRG0#/IRQ3-B
P14/TCLKA-B/SDA1/IRQ4-B
P15/TCLKB-B/SCK3/SCL1/IRQ5-B
PLLVSS
P16/TCLKC-B/RxD3/SDA0/IRQ6-B
PLLVCC
P20/PO0/TIOCA3/TIOCB3/TMRI0/TxD0
PC5/A21/SCK5/CS5#-D
P82/TRCLK
P17/TCLKD-B/TxD3/SCL0/ADTRG1#/IRQ7-B
PE
1/
D
9
PE
3/
D
11
PE
4/
D
12
PE
5/
D
13
/IR
Q
5-
A
PE
6/
D
14
/IR
Q
6-
A
PE
7/
D
15
/IR
Q
7-
A
PA
0/
A0/
BC
0#
/P
O
16
/T
IO
C
A6
PA
1/
A1/
PO
17
/T
IO
C
A6
/T
IO
C
B6
PA
2/
A2/
PO
18
/T
IO
C
C
6/
TC
LK
E
PA
3/
A3/
PO
19
/T
IO
C
C
6/
TI
O
CD
6/
TC
LK
F
PA
4/
A4/P
O
20
/T
IOCA
7
PA
5/
A5/
PO
21
/T
IO
C
A7
/T
IO
C
B7
/T
C
LK
G
PA
6/
A6/P
O
22
/T
IOCA
8
VS
S
PB
0/
A8/P
O
24
/T
IOCA
9
VC
C
P7
0/
CS
3#
-B
/A
D
TRG
2#
P7
1/
CS
4#
-C
/C
S5
#-
C
/CS
6#
-C
/C
S7
#-
C
P7
2
P7
3
P7
4/
ADTR
G
3#
PB
1/
A9/
PO
25
/T
IO
C
A9
/T
IO
C
B9
PB
2/
A10/P
O
26
/TIO
CC
9
PB
3/
A1
1/P
O
27
/TI
O
CC
9/
TI
O
CD
9
PB
4/
A12/P
O
28
/TIO
C
A1
0
PB
5/
A1
3/P
O
29
/TI
O
C
A
10
/T
IO
C
B
10
PB
6/
A14/P
O
30
/TIO
C
A1
1
PB
7/
A1
5/P
O
31
/TI
O
C
A
11
/T
IO
C
B
11
PC
0/A
16
PC
1/A
17
VS
S
PC
2/A
18
PC
3/A
19
PE
2/
D
10
PA
7/
A7/
PO
23
/T
IO
C
A8
/T
IO
C
B8
/T
C
LK
H
VC
C
P0
4/
TM
C
I3
/T
xD
4/
IR
Q
12
-A
/T
D
I
P67
/D
A1
P66
/D
A0
AVS
S
P02/
TM
O
2/S
C
K6/
IR
Q
10
-A
/T
R
ST#
P
01/
TM
C
I2
/R
xD
6/
IR
Q
9-
A
P
00/
TM
R
I2/
Tx
D
6/
IR
Q
8-
A
P
65/
IR
Q
15
-A
EM
LE
W
D
TO
VF
#/
TD
O
VS
S
M
D
E
VC
L
M
D
0
P
86
P
85
RES
#
XTA
L
VS
S
EXTA
L
VC
C
N
M
I
P34
/P
O
12/
TI
O
C
A1
/IR
Q
4-
A
P
33/PO
11
/T
IO
CC
0/TIO
C
D
0/
TC
LKB
-A
/IR
Q
3-
A
P3
2/
PO
10/TIO
C
C
0/
TC
LKA
-A
/IR
Q
2-
A
P3
1/
PO
9/
TI
O
C
A0/
TI
O
C
B0
/IR
Q
1-
A
P3
0/
PO
8/
TI
O
C
A0
/IR
Q
0-
A
P
27
/PO
7/TIO
C
A
5/
TIO
C
B5/S
C
K1
P
26/P
O
6/T
IO
C
A5
/TM
O
1/
Tx
D
1
P25
/P
O
5/
TI
O
C
A4
/T
M
C
I1
/R
xD
1
P2
4/
PO
4/
TI
O
C
A4/TI
O
C
B4
/T
M
R
I1
P23/
PO
3/
TI
O
CC
3/
TI
O
C
D
3
P21
/P
O
1/
TI
O
C
A3
/T
M
C
I0
/R
xD
0
P0
3/
TM
R
I3
/S
C
K4/I
R
Q
11
-A
/T
M
S
M
D
1
P
22/P
O
2/
TI
O
C
C
3/
TM
O
0/S
C
K0
42
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