PCI-EK01 Users Manual (Rev 1.0)
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http://www.daqsystem.com
8
JP5
DAC Reference Voltage Selection
ADC reference out or
DAC Power
9
JP6
FPGA Parallel configuration
Not used
10
JP7
EPLD(XC9536XL) JTAG
11
JP8
FPGA configuration Mode Selection
12
JP9
Serial Flash Mode Selection
Future Upgrade
13
JP10
FPGA & Serial Flash Program JTAG
14
JP11
+/- 12V Power
Not used
15
JP12
PCI I/O Power
Not used
16
JP13
User defined Jumper
– Connection Tact Switch
17
LED1-3
LED5
For PCI Transition Monitor
18
LED4
FPGA configuration Indicator
19
LED6
Clock Indicator
20
LED7
PCI Target select
21
SW1-3
User Definition
Not used
22
SW4
FPGA Re-configuration
23
SW5
User Definition
Not used
24
COM1
RS232C
Future Upgrade
25
Y1
User Definition Clock
A user gets arbitrary clock at Timer/Counter
function so as usable.
Future Upgrade
The basically explanation is like [Table 1]. Each connector jumper continuous explains in detail.
