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USB-EK01 Users Manual (Rev 1.0)
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4.3 Booting Option
In case of AN2131, there is three reset mode.
(1) Power On Reset : When power on, let reset state stay to EZ-USB core as much
as a time constant at external RC circuit until internal PLL becomes stabilization.
At this time, a value of register inner chip become initialization to fixed prices.
(2) 8051 Reset : It exchange a value of
“
CPUCS
”
register at EZ_USB core, and can
control a reset of 8051 core. When Power On Reset, a value of initialization is a
reset state. In order to get out of this state, when modify through USB at
Host(PC), when EEPROM load or external program memory using(EA=1), the
reset is released automatically.
(3) USB Bus Reset : If SE0 state(D+ and D- is all low) is kept more than 10mSEC
at Host(PC), it perceive at EZ-USB core automatically, it inform this to 8051 to
generate interruptINT2). Most registers aren
’
t affected when USB Bus Reset.
Mainly registers related to USB data transmission are set up to initial prices.
8051
Core
Reset
EZ-USB
Core
XIN/OUT
Reset
Oscillator
PLL
/2
CLK24
EA
I2C
EEPROM
Address
Data
+3.3V
12Mhz
24Mhz
48Mhz
USB
Power ON
Reset
USB Bus Reset
8051 Reset
[Figure 4.8 AN2131 Reset and Booting]
If the AN2131 is released to Power On Reset, first
“
I2C Boot Loader
”
operates, it
confirm that EEPROM is connected to an external I2C bus. If EEPROM operates
(Ack is asserted), it decide according to data of EEPROM first byte how to operate.
If there isn
’
t EEPROM, it releases 8051 at reset so as to be able to bring a program
at external program memory as inspect a state of EA pin if it is
‘
1
’
. VID/PID/DID
get a value at external programs and register it to Host(PC).
If there is EEPROM, if the first byte value isn
’
t 0xB0 and B2, the VID, PID of
