Dallas DS80C390, Руководство пользователя

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DS80C390 Dual CAN High-Speed Microprocessor
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ELECTRICAL CHARACTERISTICS—(NONMULTIPLEXED ADDRESS/DATA BUS)
(Note 13)
40MHz VARIABLE CLOCK
PARAMETER SYMBOL CONDITIONS
MIN MAX MIN MAX
UNITS
External oscillator 0 40 0 40
Oscillator Frequency 1 / t
CLCL
External crystal 1 40 1 40
MHz
PSEN
Pulse Width t
PLPH
0.5 t
MCS
- 8 ns
PSEN
Low to Valid Instruction In t
PLIV
0.5 t
MCS
- 20 ns
Input Instruction Hold After
PSEN t
PXIX
0 0 ns
Input Instruction Float After
PSEN t
PXIZ
See MOVX
Characteristics
ns
Port 1 Address, Port 4 CE to Valid
Instruction In
t
AVIV1
0.75 t
MCS
- 22 ns
Port 2, 4 Address to Valid Instruction
In
t
AVIV2
0.875 t
MCS
- 30 ns
Note 13: All parameters apply to both commercial and industrial temperature operation unless otherwise noted. The value t
MCS
is a function of
the machine cycle clock in terms of the processor’s input clock frequency. These relationships are described in the Stretch Value
Timing table. All signals characterized with load capacitance of 80pF except Port 0, ALE,
PSEN
,
RD
, and
WR
with 100pF. Interfacing
to memory devices with float times (turn off times) over 25ns can cause bus contention. This does not damage the parts, but causes
an increase in operating current. Specifications assume a 50% duty cycle for the oscillator. Port 2 and ALE timing changes in relation
to duty cycle variation. Some AC timing characteristic drawings contain references to the CLK signal. This waveform is provided to
assist in determining the relative occurrence of events and cannot be used to determine the timing of signals relative to the external
clock.
Figure 13. Nonmultiplexed External Program Memory Read Cycle