7. Internal Block Diagram of ICs
Model : DV-115
AK-4112A
6
5
4
3
2
1
DVDD
DVSS
V/TX
TVDD
XTI
XTO
PDN
7
R
8
Top
View
10
9
AVDD
AVSS
RX1
11
RX2/DIF0
12
13
14
RX3/DIF1
RX4/DIF2
CM0/CDTO
CM1/CDTI
OCKS1/CCLK
OCKS0/CSN
MCKO1
MCKO2
DAUX
BICK
SDTO
LRCK
ERF
FS96
23
24
25
26
27
28
22
21
19
20
18
17
16
15
P/SN
AUTO
Input
Selector
System
Control
Clock
Recovery
Clock
Generator
DAIF
Decoder
AC-3/MPEG
Detect
Error
Detect
DEM
p I/F
Audio
I/F
96kHz
Detect
X’tal
Oscillator
RX1
RX2
RX3
RX4
V/TX
DVDD
DVSS
PDN
AUTO
ERF
P/S="L"
TVDD
LRCK
BICK
SDTO
DAUX
FS96
XTO
XTI
MCKO2
MCKO1
R
AVDD
AVSS
CDTI
CDTO
CCLK
CSN
Serial Control Mode
System
Control
Clock
Recovery
Clock
Generator
DAIF
Decoder
AC-3/MPEG
Detect
Error
Detect
DEM
Audio
I/F
96kHz
Detect
X’tal
Oscillator
RX1
V
DVDD
DVSS
AUTO
ERF
P/S="H"
TVDD
LRCK
BICK
SDTO
DAUX
FS96
XTO
XTI
MCKO2
MCKO1
R
AVDD
AVSS
CM1
CM0
OCKS1
OCKS0
OCKS0
PDN
OCKS1
CM0
CM1
DIF0
DIF1
DIF2
4
Parallel Control Mode
6. Waveforms of Major Check Method
Model : DV-115
-. Audio Out Signal Waveform
-. DAC Output Signal Waveform
-. Optical Output Audio Data Signal form
-. L/R Clock Data Waveform During Normal Play
-. Serial Data Output Waveform During Normal Play
-. Cr Output Data Waveform in Component Output
-. Cb Output Data Waveform in Component Output
-. Y Output Data Waveform in Component Output
11
11