Daewoo DSN-9070, Руководство по обслуживанию

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4. Description of the Circuit Operation
1. ARM 7500FE PART
The circuit is divided into digital and analogue input/output parts around the ARM 7500FE part.
Two addresses and two data buses are basically served from the ARM 7500FE part.
- RA (DRAM ROW/COLUMN MULTIPLEXED ADDRESSES) uses 12 bits.
- LA (LATCHED ADDRESSES) uses 29 bits.
- D (MAIN DATA BUS) uses 32 bits.
- BD (MAIN EXTERNAL BUS) uses 16 bits.
RA and D are connected to the DRAM (the capacity is 8~16 Mbyte), the main memory, and are used
when the actual program is operated.
2. PROM part
D and LA are connected to the PROM (the capacity is 512 kbyte).
When the power is turned on, the system reads the initial program codes set in the PROM
and loads them onto the memory.
There is a small WEB BROWSER for emergency use in the PROM.
This can be used if there are any problems in the WEB BROWSER.
The small WEB BROWSER can be loaded by operating the power and the A/S SW.
(Turn the power on while pressing the A/S SW, then turn the A/S SW off in 5 sec.)
3. FLASH MEMORY part
BD and LA are connected to FLASH MEMORY (the capacity is 2 Mbyte to 4 Mbyte memories),
which performs the same function as a hard disc in a PC.
The main program, WEB BROWSER, is loaded, and the INTERNET SET TOP BOX operates.
4. RECEIVER CIRCUIT part
These can be used as wireless-type accessories through the receiver circuit composed of receiver devices,
89C2051 and 97L52.
5. PRINTER OUTPUT part
8 bit data is supplied to the printer port from BD through 74HC377 for printing.
The printer control signals are supplied through the 8 bit WIDE IO PORT.
6. VIDEO OUTPUT part
The composite video and S-VHS(Y, C) signals are provided so the the signals can be displayed on the TV using the
CH7001C NTSC ENCODER.
- Horizontal/vertical position change : UP(#26), DOWN(#27), LEFT(#28), RIGHT(#29)
- Flicker filtering : MS0(#11), MS1(#12)