Daewoo DSL15M1TC, Руководство по обслуживанию

Страница: 43 / 82

42
173 C_2
IO_2
(RD18)
Input
Non-pull
1)
2) Digital Video output C bit 2
GPIO
172 C_3
IO_3
(RD19)
Input
Non-pull
1)
2) Digital Video output C bit 3
GPIO
171 C_4
IO_4
(RD20)
Input
Non-pull
1)
2) Digital Video output C bit 4
GPIO
169 C_5
IO_5
(RD21)
Input
Non-pull
1)
2) Digital Video output C bit 5
GPIO
168 C_6
IO_6
(RD22)
Input
Non-pull
1)
2) Digital Video output C bit 6
GPIO
167 C_7
IO_7
(RD23)
Input
Non-pull
1)
2) Digital Video output C bit 7
GPIO
177 IO_17 (DQM2)
Input
Non-pull
GPIO
166 YUVCLK
IO_8
(DQM3)
Input
Non-pull
1)
2) Digital Video output Clock
GPIO
165 Y_0
IO_9
(RD24)
Input
Non-pull
1)
2) Digital Video output Y bit 0
GPIO
164 Y_1
IO_10
(RD25)
Input
Non-pull
1)
2) Digital Video output Y bit 1
GPIO
163 Y_2
IO_11
(RD26)
Input
Non-pull
1)
2) Digital Video output Y bit 2
GPIO
162 Y_3
IO_12
(RD27)
Input
Non-pull
1)
2) Digital Video output Y bit 3
GPIO
161 Y_4
IO_13
(RD28)
Input
Non-pull
1)
2) Digital Video output Y bit 4
GPIO
159 Y_5
IO_14
(RD29)
Input
Non-pull
1)
2) Digital Video output Y bit 5
GPIO
158 Y_6
IO_15
(RD30)
Input
Non-pull
1)
2) Digital Video output Y bit 6
GPIO
157 Y_7
IO_16
(RD31)
Input
Non-pull
1)
2) Digital Video output Y bit 7
GPIO
155 RA4 Input
DRAM address 4
154 RA5
Input
DRAM address 5
153 RA6
Input
DRAM address 6
152 RA7
Input
DRAM address 7
151 RA8 Input DRAM address 8
150 RA9
Input
DRAM address 9
149 RA11
Input
Pull-Down
DRAM address bit 11
147 CKE output DRAM clock enable
146 RCLK Input Dram clock
144 RA3
Input
DRAM address 3
143 RA2
Input
DRAM address 2
141 RA1
Input
DRAM address 1
140 RA0
Input
DRAM address 0