Daewoo AKD-80C, Руководство по обслуживанию

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DAEWOO
3. TERMINAL VOLTAGE & DESCRIPTION
- 20 -
Defect detection signal(DEF)input. When not used,must be connected to 0V
For the PLL
Test input.Equipped with internal pull-down resistor.Must be connected to 0V
External VCO control phase comparator output
Internal VCO ground.Must be connected 0V
PDO output current adjustment resistor connection
Internal VCO power supply
VCO frequency range adjustment
Digital system ground. Must be connected to 0V
Test operation mode control input.Must be connected to VDD.
Test operation mode control input.Must be connected to VDD.
Test operation mode control input.Must be connected to VDD.
Test operation mode control input.Must be connected to VDD.
Test operation mode control input.Must be connected to VDD.
Test input.Equipped with internal pull-down resistor.Must be connected to 0V
Chip select input.Equipped with internal pull-down resistor.
When not controlled,must be connected to 0V
Test input. Must be connected to 0V
For slice
level control
EFM signal output
EFM signal input
Test input.Equipped with internal pull-down resistor.Must be connected to 0v
Disk motor control output.Can have a 3-state output depending on the
command
Rough servo/phase control automatic switching monitor output.If a high level then
rough servo mode.If a low level then phase control mode.
Track detect signal input.Schmidt input.
Tracking error signal input.Schmidt input.
Tracking off output.
Tracking gain switch output.Gain is increased with low level
Track jump control output.Can be 3-state output depending on the command.
EFM data playback clock monitor. 4.3218 MHz during phase lock.
Sync signal detect output.A high level when the sync signal detected from the EFM
signal matches the internally generated sync signal.
Digital system power supply.
Reset signal input for initializing only the anti-shock control part.(i.e. excluding the
DSP part.)Resets when this pin is low level,and release the reset when this pin is
high level.Tie this pin to the low level.(i.e.connected to 0V)if when using software
control on the anti-shock part alone through the anti-shock part only reset
disable/release command($f4) or the anti-shock only reset enable/inrush
command($f5).
Note:This pin is assigned as the least significant bit of the general I/O port however,
use as a general I/O pin is disabled.When the port I/O set command($DB) is
executed.The least significant bit is always “0”,and the output driver is not turned
ON.
1
2
3
4
5
6
7
8
9
10
11
12
13
I
O
P
AI
P
AI
P
I
I
I
I
I
I
I
I
O
I
I
O
O
O
I
I
O
O
O
O
O
O
P
I(I/O)
DEFI
TAI
PDO
VVss
ISET
VV
DD
FR
Vss
TESCLK
TESA
TESB
TESC
TESGB
TEST5
CS
TEST1
EFMO
EFMI
TEST2
CLV+
CLV-
V/P
HFL
TES
TOFF
TGL
JP+
JP
-
PCK
FSEQ
V
DD
ASRES
14
15
16
17
18
19
20
21
22
23
24
26
28
29
30
31
32
25
27
PIN
No
PIN
NAME
I/O FUNCTION
I