Cypress S29GL01GP, Руководство пользователя

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Document Number: 002-00886 Rev. *B Page 52 of 83
S29GL01GP
S29GL512P
S29GL256P
S29GL128P
11.7 AC Characteristics
11.7.1 S29GL-P Read Operations
Notes
1. CE#, OE# = V
IL
2. OE# = V
IL
3. Not 100% tested.
4. See Figure 11.3 and Table for test specifications.
5. Unless otherwise indicated, AC specifications for 110 ns speed options are tested with V
IO
= V
CC
= 2.7 V. AC specifications for 110 ns speed
options are tested with V
IO
= 1.8 V and V
CC
= 3.0 V.
S29GL-P Read Operations
Parameter
Description
(Notes) Test Setup
Speed Options
JEDEC Std. 90 100 110 120 130 Unit
t
AVAV
t
RC
Read Cycle Time
V
IO
= V
CC
= 2.7 V
Min
– 100 110 120 –
ns
V
IO
= 1.65 V to V
CC
,
V
CC
= 3 V
– – 110 120 130
V
IO
= V
CC
= 3.0 V 90 100 110 – –
t
AVQV
t
ACC
Address to Output Delay (1)
V
IO
= V
CC
= 2.7 V
Max
– 100 110 120 –
ns
V
IO
= 1.65 V to V
CC
,
V
CC
= 3 V
– – 110 120 130
V
IO
= V
CC
= 3.0 V 90 100 110 – –
t
ELQV
t
CE
Chip Enable to Output Delay (2)
V
IO
= V
CC
= 2.7 V
Max
– 100 110 120 –
ns
V
IO
= 1.65 V to V
CC
,
V
CC
= 3 V
– – 110 120 130
V
IO
= V
CC
= 3.0 V 90 100 110 – –
t
PACC
Page Access Time Max 25 ns
t
GLQV
t
OE
Output Enable to Output Delay Max 25 ns
t
EHQZ
t
DF
Chip Enable to Output High Z (3) Max 20 ns
t
GHQZ
t
DF
Output Enable to Output High Z (3) Max 20 ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE#
or OE#, Whichever Occurs First
Min 0 ns
t
OEH
Output Enable Hold Time
(3)
Read Min 0 ns
Toggle and
Data# Polling
Min 10 ns
t
CEH
Chip Enable Hold Time Read Min 35 ns