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Document Number: 002-12597 Rev. ** 

Page 15 of 38

PRELIMINARY

CYBLE-212020-01

I

DD8

Execute from flash; CPU at 12 MHz

–

–

–

mA

T = –40 °C to 85 °C

I

DD9

Execute from flash; CPU at 24 MHz

–

7.1

–

mA

T = 25 °C, 
V

DD

 = 3.3 V

I

DD10

Execute from flash; CPU at 24 MHz

–

– 

–

mA

T = –40 °C to 85 °C

I

DD11

Execute from flash; CPU at 48 MHz

– 

13.4

–

mA

T = 25 °C, 
V

DD

 = 3.3 V

I

DD12

Execute from flash; CPU at 48 MHz

–

–

–

mA

T = –40 °C to 85 °C

Sleep Mode, V

DD

 = 1.8 to 5.5 V

I

DD13

IMO on

–

– 

–

mA

T = 25 °C, V

DD

 = 3.3 V, 

SYSCLK = 3 MHz

Sleep Mode, V

DD

 and V

DDR

 = 1.9 to 5.5 V

I

DD14

ECO on

–

–

–

mA

T = 25 °C, V

DD

 = 3.3 V, 

SYSCLK = 3 MHz

Deep-Sleep Mode, V

DD

 = 1.8 to 3.6 V

I

DD15

WDT with WCO on

–

1.5

–

µA

T = 25 °C,
V

DD

 = 3.3 V

I

DD16

WDT with WCO on

–

–

– 

µA

T = –40 °C to 85 °C

I

DD17

WDT with WCO on

–

–

–

µA

T = 25 °C, 
V

DD

 = 5 V

I

DD18

WDT with WCO on

–

–

–

µA

T = –40 °C to 85 °C

Deep-Sleep Mode, V

DD

 = 1.71 to 1.89 V (Regulator Bypassed)

I

DD19

WDT with WCO on

–

–

–

µA

T = 25 °C

I

DD20

WDT with WCO on

–

–

–

µA

T = –40 °C to 85 °C

Hibernate Mode, V

DD

 = 1.8 to 3.6 V

I

DD27

GPIO and reset active

–

150

–

nA

T = 25 °C, 
V

DD

 = 3.3 V

I

DD28

GPIO and reset active

–

–

–

nA

T = –40 °C to 85 °C

Hibernate Mode, V

DD

 = 3.6 to 5.5 V

I

DD29

GPIO and reset active

–

–

–

nA

T = 25 °C, 
V

DD

 = 5 V

I

DD30

GPIO and reset active

–

–

–

nA

T = –40 °C to 85 °C

Stop Mode, V

DD

 = 1.8 to 3.6 V

I

DD33

Stop-mode current (V

DD

)

–

20

–

nA

T = 25 °C, 
V

DD

 = 3.3 V

I

DD34

Stop-mode current (V

DDR

)

–

40

–- nA

T = 25 °C, 
V

DDR

 = 3.3 V

I

DD35

Stop-mode current (V

DD

)

–

–

–

nA

T = –40 °C to 85 °C

I

DD36

Stop-mode current (V

DDR

)

–

–

–

nA

T = –40 °C to 85 °C, 
V

DDR

 = 1.9 V to 3.6 V

Stop Mode, V

DD

 = 3.6 to 5.5 V

I

DD37

Stop-mode current (V

DD

)

–

–

–

nA

T = 25 °C, 
V

DD

 = 5 V

I

DD38

Stop-mode current (V

DDR

)

–

–

–

nA

T = 25 °C, 
V

DDR

 = 5 V

I

DD39

Stop-mode current (V

DD

)

–

–

–

nA

T = –40 °C to 85 °C

I

DD40

Stop-mode current (V

DDR

)

–

–

–

nA

T = –40 °C to 85 °C

Table 9.  CYBLE-212020-01 DC Specifications

 (continued)

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

Содержание EZ-BLE PRoC

Страница 1: ...to 48 MHz Watchdog timer with dedicated internal low speed oscillator ILO Two pin SWD for programming Power Consumption TX output power 18 dbm to 3 dbm Received signal strength indicator RSSI with 1 dB resolution TX current consumption of 15 6 mA radio only 0 dbm RX current consumption of 16 4 mA radio only Low power mode support Deep Sleep 1 3 µA with watch crystal oscillator WCO on Hibernate 150...

Страница 2: ...luetooth LE Test and Debug Tool Windows CYSmart Mobile Bluetooth LE Test and Debug Tool Android iOS Mobile App PSoC Creator Integrated Design Environment IDE PSoC Creator is an Integrated Design Environment IDE that enables concurrent hardware and firmware editing compiling and debugging of PSoC 3 PSoC 4 PSoC 5LP PSoC 4 BLE PRoC BLE and EZ BLE module systems with no code size limitations PSoC peri...

Страница 3: ...mmunication 22 Memory 23 System Resources 23 Environmental Specifications 29 Environmental Compliance 29 RF Certification 29 Safety Certification 29 Environmental Conditions 29 ESD and EMI Protection 29 Regulatory Information 30 FCC 30 Industry Canada IC Certification 31 European R TTE Declaration of Conformity 31 MIC Japan 32 KC Korea 32 Packaging 33 Ordering Information 35 Part Numbering Convent...

Страница 4: ...mponent area are maintained Designs should be held within the physical dimensions shown in the mechanical drawings in Figure 1 All dimensions are in millimeters mm Table 1 Module Design Dimensions See Figure 1 on page 5 for the mechanical reference drawing for CYBLE 212020 01 Dimension Item Specification Module dimensions Length X 14 52 0 15 mm Width Y 19 20 0 15 mm Antenna location dimensions Len...

Страница 5: ...g Top View View from Top Bottom View Seen from Bottom Side View Note 1 No metal should be located beneath or above the antenna area Only bare PCB material should be located beneath the antenna area For more information on recommended host PCB layout see Figure 3 Figure 4 Figure 5 and Figure 6 and Table 3 ...

Страница 6: ...he far corner This placement minimizes the additional recommended keep out area stated in item 2 Please refer to AN96841 for module placement best practices 2 To maximize RF performance the area immediately around the Cypress BLE module trace antenna should contain an additional keep out area where no grounding or signal trace are contained The keep out area applies to all layers of the host board...

Страница 7: ...llimeters unless otherwise noted Pad length of 1 27 mm 0 635 mm from center of the pad on either side shown in Figure 6 is the minimum recommended host pad length The host PCB layout pattern can be completed using either Figure 4 Figure 5 or Figure 6 It is not necessary to use all figures to complete the host PCB layout pattern Figure 4 Host Layout Pattern for CYBLE 212020 01 Figure 5 Module Pad L...

Страница 8: ... 15 35 392 13 6 0 39 11 23 15 35 442 13 7 0 39 12 50 15 35 492 13 8 0 39 13 77 15 35 542 13 9 0 39 15 04 15 35 592 13 10 0 39 16 31 15 35 642 13 11 0 39 17 58 15 35 692 13 12 2 04 18 82 80 31 740 94 13 3 31 18 82 130 31 740 94 14 4 58 18 82 180 31 740 94 15 5 85 18 82 230 31 740 94 16 7 12 18 82 280 31 740 94 17 8 39 18 82 330 31 740 94 18 9 66 18 82 380 31 740 94 19 10 93 18 82 430 31 740 94 20 1...

Страница 9: ...3_N Sensor 17 P1 6 SCB0_RTS SCB0_SS0 TCPWM3_P Sensor 18 P1 5 SCB0_TX SCB0_MISO SCB0_SCL TCPWM2_N Sensor 19 P1 4 SCB0_RX SCB0_MOSI SCB0_SDA TCPWM2_P Sensor 20 P1 0 TCPWM0_P Sensor 21 P0 4 SCB0_RX SCB0_MOSI SCB0_SDA TCPWM1_P Sensor 22 P0 5 SCB0_TX SCB0_MISO SCB0_SCL TCPWM1_N Sensor 23 P0 7 SCB0_CTS SCB0_SCLK TCPWM2_N Sensor SWDCLK 24 P0 6 SCB0_RTS SCB0_SS0 TCPWM2_P Sensor SWDIO 25 GND 4 Ground Conne...

Страница 10: ...ns Two connection options are available for any application 1 Single supply Connect VDD and VDDR to the same supply 2 Independent supply Power VDD and VDDR separately External Component Recommendation In either connection scenario it is recommended to place an external ferrite bead between the supply and the module connection The ferrite bead should be positioned as close as possible to the module...

Страница 11: ...Document Number 002 12597 Rev Page 11 of 38 PRELIMINARY CYBLE 212020 01 Figure 8 Recommended Host Schematic for an Independent Supply Option ...

Страница 12: ...Document Number 002 12597 Rev Page 12 of 38 PRELIMINARY CYBLE 212020 01 The CYBLE 212020 01 schematic is shown in Figure 9 Figure 9 CYBLE 212020 01 Schematic Diagram ...

Страница 13: ...ble 6 details trace antenna used in the CYBLE 212020 01 module For more information see Table 8 Table 6 Trace Antenna Specifications Component Reference Designator Description Silicon U1 56 pin QFN Programmable Radio on Chip PRoC with BLE Crystal Y1 24 000 MHz 12PF Crystal Y2 32 768 kHz 12 5PF Item Description Frequency Range 2400 2500 MHz Peak Gain 0 5 dBi typical Average Gain 0 5 dBi typical Ret...

Страница 14: ...PIO_ABS Maximum current per GPIO 25 25 mA Absolute maximum IGPIO_injection GPIO injection current Maximum for VIH VDD and minimum for VIL VSS 0 5 0 5 mA Absolute maximum current injected per pin LU Pin current for latch up 200 200 mA Parameter Description Min Typ Max Units Details Conditions RFO RF output power on ANT 18 0 3 dBm Configurable via register settings RXS RF receive sensitivity on ANT ...

Страница 15: ...Mode VDD 1 71 to 1 89 V Regulator Bypassed IDD19 WDT with WCO on µA T 25 C IDD20 WDT with WCO on µA T 40 C to 85 C Hibernate Mode VDD 1 8 to 3 6 V IDD27 GPIO and reset active 150 nA T 25 C VDD 3 3 V IDD28 GPIO and reset active nA T 40 C to 85 C Hibernate Mode VDD 3 6 to 5 5 V IDD29 GPIO and reset active nA T 25 C VDD 5 V IDD30 GPIO and reset active nA T 40 C to 85 C Stop Mode VDD 1 8 to 3 6 V IDD3...

Страница 16: ...VDD 2 7 V 2 0 V VIL Input voltage LOW threshold 0 3 VDD V CMOS input LVTTL input VDD 2 7 V 0 3 VDD V LVTTL input VDD 2 7 V 0 8 V VOH Output voltage HIGH level VDD 0 6 V IOH 4 mA at 3 3 V VDD Output voltage HIGH level VDD 0 5 V IOH 1 mA at 1 8 V VDD VOL Output voltage LOW level 0 6 V IOL 8 mA at 3 3 V VDD Output voltage LOW level 0 6 V IOL 4 mA at 1 8 V VDD Output voltage LOW level 0 4 V IOL 3 mA a...

Страница 17: ...ion Min Typ Max Units Details Conditions IIL Input leakage absolute value VIH VDD 10 µA 25 C VDD 0 V VIH 3 0 V VOL Output voltage LOW level 0 4 V IOL 20 mA VDD 2 9 V Table 14 OVT GPIO AC Specifications P5_0 and P5_1 Only Parameter Description Min Typ Max Units Details Conditions TRISE_OVFS Output rise time in Fast Strong mode 1 5 12 ns 25 pF load 10 90 VDD 3 3 V TFALL_OVFS Output fall time in Fast...

Страница 18: ...d with 1 V VREF A_ISAR Current consumption 1 mA A_VINS Input voltage range single ended VSS VDDA V A_VIND Input voltage range differential VSS VDDA V A_INRES Input resistance 2 2 k A_INCAP Input capacitance 10 pF VREFSAR Trimmed internal reference to SAR 1 1 Percentage of Vbg 1 024 V Table 19 SAR ADC AC Specifications Parameter Description Min Typ Max Units Details Conditions A_PSRR Power supply r...

Страница 19: ...ditions CSD Block Specifications Parameter Description Min Typ Max Units Details Conditions VCSD Voltage range of operation 1 71 5 5 V IDAC1 DNL for 8 bit resolution 1 1 LSB IDAC1 INL for 8 bit resolution 3 3 LSB IDAC2 DNL for 7 bit resolution 1 1 LSB IDAC2 INL for 7 bit resolution 3 3 LSB SNR Ratio of counts of finger to noise 5 Ratio Capacitance range of 9 pF to 35 pF 0 1 pF sensitivity Radio is...

Страница 20: ... TTENWIDEXT Enable pulse width external 2 TCLK ns TTIMRESWINT Reset pulse width internal 2 TCLK ns TTIMRESEXT Reset pulse width external 2 TCLK ns Table 22 Counter DC Specifications Parameter Description Min Typ Max Units Details Conditions ICTR1 Block current consumption at 3 MHz 42 µA 16 bit counter ICTR2 Block current consumption at 12 MHz 130 µA 16 bit counter ICTR3 Block current consumption a...

Страница 21: ...LK ns TPWMKILLEXT Kill pulse width external 2 TCLK ns TPWMEINT Enable pulse width internal 2 TCLK ns TPWMENEXT Enable pulse width external 2 TCLK ns TPWMRESWINT Reset pulse width internal 2 TCLK ns TPWMRESWEXT Reset pulse width external 2 TCLK ns Table 26 LCD Direct Drive DC Specifications Parameter Description Min Typ Max Units Details Conditions ILCDLOW Operating current in low power mode 17 5 µ...

Страница 22: ...arameter Description Min Typ Max Units Details Conditions ISPI1 Block current consumption at 1 Mbps 360 µA ISPI2 Block current consumption at 4 Mbps 560 µA ISPI3 Block current consumption at 8 Mbps 600 µA Table 33 Fixed SPI AC Specifications Parameter Description Min Typ Max Units Details Conditions FSPI SPI operating frequency master 6x over sampling 8 MHz Table 34 Fixed SPI Master Mode AC Specif...

Страница 23: ...85 C 10 K P E cycles 10 years Note 7 It can take as much as 20 ms to write to flash During this time the device should not be reset or flash operations will be interrupted and cannot be relied on to have completed Reset sources include the XRES pin software resets CPU lockup states and privilege violations improper power supply levels and watchdogs Make certain that these are not inadvertently act...

Страница 24: ...3 0 1001b 2 54 2 60 2 67 V VLVI11 LVI_A D_SEL 3 0 1010b 2 63 2 70 2 77 V VLVI12 LVI_A D_SEL 3 0 1011b 2 73 2 80 2 87 V VLVI13 LVI_A D_SEL 3 0 1100b 2 83 2 90 2 97 V VLVI14 LVI_A D_SEL 3 0 1101b 2 93 3 00 3 08 V VLVI15 LVI_A D_SEL 3 0 1110b 3 12 3 20 3 28 V VLVI16 LVI_A D_SEL 3 0 1111b 4 39 4 50 4 61 V LVI_IDD Block current 100 µA Table 43 Voltage Monitor AC Specifications Parameter Description Min...

Страница 25: ...O2 ILO operating current at 32 kHz 0 3 1 05 µA Table 48 ILO AC Specifications Parameter Description Min Typ Max Units Details Conditions TSTARTILO1 ILO startup time 2 ms FILOTRIM1 32 kHz trimmed frequency 15 32 50 kHz Parameter Description Value Details Conditions ECOTRIM 24 MHz trim value firmware configuration 0x00007FDC Optimum trim value that needs to be loaded to register CY_SYS_XTAL_BLERD_BB...

Страница 26: ...ification RCV LE CA 04 C OBB3 Out of band blocking Wanted signal at 67 dBm and Interferer at F 2484 2997 MHz 35 27 dBm RF PHY Specification RCV LE CA 04 C OBB4 Out of band blocking Wanted signal a 67 dBm and Interferer at F 3000 12750 MHz 30 27 dBm RF PHY Specification RCV LE CA 04 C IMD Intermodulation performance Wanted signal at 64 dBm and 1 Mbps BLE third fourth and fifth offset channel 50 dBm...

Страница 27: ...l mode 16 4 mA Measured at VDDR IRX HIGHGAIN Receive current in high gain mode 21 5 mA ITX 3dBm TX current at 3 dBm setting PA10 20 mA ITX 0dBm TX current at 0 dBm setting PA7 16 5 mA ITX_RF 0dBm Radio TX current at 0 dBm setting PA7 15 6 mA Measured at VDDR ITX_RF 0dBm Radio TX current at 0 dBm excluding Balun loss 14 2 mA Guaranteed by design simulation ITX 3dBm TX current at 3 dBm setting PA4 1...

Страница 28: ...ELIMINARY CYBLE 212020 01 IDLE2RX BLE IDLE to BLE RX transition time 75 120 µs RSSI Specifications RSSI ACC RSSI accuracy 5 dB RSSI RES RSSI resolution 1 dB RSSI PER RSSI sample period 6 µs Parameter Description Min Typ Max Units Details Conditions ...

Страница 29: ... Cypress BLE module Table 51 Environmental Conditions for CYBLE 212020 01 ESD and EMI Protection Exposed components require special attention to ESD and electromagnetic interference EMI A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance Any openings in the enclosure near the module should be surrounded by a grounded conductive layer to provide ESD prot...

Страница 30: ...rcuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help LABELING REQUIREMENTS The Original Equipment Manufacturer OEM must ensure that FCC labelling requirements are met This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor FCC identifier for this product as w...

Страница 31: ...this device may not cause interference and 2 this device must accept any interference including interference that may cause undesired operation of the device Le présent appareil est conforme aux CNR d Industrie Canada applicables aux appareils radio exempts de licence L exploitation est autorisée aux deux conditions suivantes 1 l appareil ne doit pas produire de brouillage et 2 l utilisateur de l ...

Страница 32: ...e end product End product can display the certification label of the embedded module KC Korea CYBLE 212020 01 is certified for use in Korea with certificate number MSIP CRM Cyp 2011 Model Name EZ BLE PRoC Module Part Number CYBLE 212020 01 Manufactured by Cypress Semiconductor 1 제품명 모델명 특정소출력무선기기 무선데이터통신시스템용 무선기기 CYBLE 212020 01 2 인증 번호 MSIP CRM Cyp 4008 3 라이선스 소유자 Cypress Semiconductor Corporatio...

Страница 33: ... the orientation of the CYBLE 212020 01 in the tape as well as the direction for unreeling Figure 11 Component Orientation in Tape and Unreeling Direction Table 52 Solder Reflow Peak Temperature Module Part Number Package Maximum Peak Temperature Maximum Time at PeakTemperature No of Cycles CYBLE 212020 01 31 pad SMT 260 C 30 seconds 2 Table 53 Package Moisture Sensitivity Level MSL IPC JEDEC J ST...

Страница 34: ...dimensions used for the CYBLE 212020 01 Figure 12 Reel Dimensions The CYBLE 212020 01 is designed to be used with pick and place equipment in an SMT manufacturing environment The center of mass for the CYBLE 212020 01 is detailed in Figure 13 Figure 13 CYBLE 212020 01 Center of Mass Seen from Top ...

Страница 35: ...tion and a complete list of Cypress Semiconductor BLE products contact your local Cypress sales representative To locate the nearest Cypress office visit our website Part Number CPU Speed MHz Flash Size KB CapSense SCB TCPWM 12 Bit SAR ADC I2 S LCD Package Packing Certified CYBLE 212020 01 48 256 Yes 2 4 1 Msps Yes Yes 31 SMT Tape and Reel Yes U S Cypress Headquarters Address 198 Champion Court Sa...

Страница 36: ...a IDE integrated design environment KC Korea Certification MIC Ministry of Internal Affairs and Communications Japan PCB printed circuit board RX receive QDID qualification design ID SMT surface mount technology a method for producing electronic circuitry in which the components are placed directly onto the surface of PCBs TCPWM timer counter pulse width modulator PWM TUV Germany Technischer Überw...

Страница 37: ...CYBLE 212020 01 Document History Page Document Title CYBLE 212020 01 EZ BLE PRoC Bluetooth 4 2 Module Document Number 002 12597 Revision ECN Orig of Change Submission Date Description of Change MINS 04 21 2016 Preliminary datasheet for CYBLE 212020 01 module ...

Страница 38: ...nformation or programming code is provided only for reference purposes It is the responsibility of the user of this document to properly design program and test the functionality and safety of any application made of this information and any resulting product Cypress products are not designed intended or authorized for use as critical components in systems designed or intended for the operation of...

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