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Document Number: 002-00856 Rev. *E
S29JL064J
8.
Device Bus Operations
This section describes the requirements and use of the device bus operations, which are initiated through the internal command
register. The command register itself does not occupy any addressable memory location. The register is a latch used to store the
commands, along with the address and data information needed to execute the command. The contents of the register serve as
inputs to the internal state machine. The state machine outputs dictate the function of the device.
lists the device bus
operations, the inputs and control levels they require, and the resulting output. The following subsections describe each of these
operations in further detail.
Legend
L = Logic Low = V
IL
H = Logic High = V
IH
V
ID
= 11.5–12.5V
V
HH
= 9.0 ± 0.5V
X = Don’t Care
SA = Sector Address
A
IN
= Address In
D
IN
= Data In
D
OUT
= Data Out
Notes:
1. Addresses are A21:A0 in word mode (BYTE# = V
IH
), A21:A-1 in byte mode (BYTE# = V
IL
).
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See
Boot Sector/Sector Block Protection and Unprotection
3. If WP#/ACC = V
IL
, sectors 0, 1, 140, and 141 remain protected. If WP#/ACC = V
IH
, protection on sectors 0, 1, 140, and 141 depends on whether they were last
protected or unprotected using the method described in
Boot Sector/Sector Block Protection and Unprotection on page 17
. If WP#/ACC = V
HH
, all sectors will be
unprotected.
8.1
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE# pin is set at logic
‘1’, the device is in word configuration, DQ15–DQ0 are active and controlled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte configuration, and only data I/O pins DQ7–DQ0 are active and controlled by
CE# and OE#. The data I/O pins DQ14–DQ8 are tri-stated, and the DQ15 pin is used as an input for the LSB (A-1) address function.
S29JL064J Device Bus Operations
Operation
CE#
OE#
WE#
RESET#
WP#/
ACC
Addresses
DQ15–DQ8
DQ7–
DQ0
BYTE#
= V
IH
BYTE# = V
IL
Read
L
L
H
H
L/H
A
IN
D
OUT
DQ14–DQ8 = High-Z,
DQ15 = A-1
D
OUT
Write
L
H
L
H
A
IN
D
IN
D
IN
Standby
V
CC
0.3V
X
X
V
CC
0.3V
L/H
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
L/H
X
High-Z
High-Z
High-Z
Reset
X
X
X
L
L/H
X
High-Z
High-Z
High-Z
Sector Protect
L
H
L
V
ID
L/H
SA, A6 = L,
A1 = H, A0 = L
X
X
D
IN
Sector Unprotect
L
H
L
V
ID
SA, A6 = H,
A1 = H, A0 = L
X
X
D
IN
Temporary Sector
Unprotect
X
X
X
V
ID
A
IN
D
IN
High-Z
D
IN