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CY8C24123

CY8C24223, CY8C24423

Document Number: 38-12011 Rev. *G

Page 40 of 43

Figure 25. 28-Pin (210-Mil) SSOP

Figure 26. 28-Pin (300-Mil) Molded SOIC

51-85079 *C

51-85026 *D

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Содержание CY8C24123

Страница 1: ...Storage 50 000 Erase Write Cycles 256 Bytes SRAM Data Storage In System Serial Programming ISSP Partial Flash Updates Flexible Protection Modes EEPROM Emulation in Flash Programmable Pin Configuration...

Страница 2: ...MHz for use by the digital system A low power 32 kHz ILO internal low speed oscillator is provided for the Sleep timer and WDT If crystal accuracy is desired the ECO 32 768 kHz external crystal oscill...

Страница 3: ...th 16 selectable thresholds DACs up to two with 6 to 9 bit resolution Multiplying DACs up to two with 6 to 9 bit resolution High current output drivers two with 30 mA drive as a Core Resource 1 3V ref...

Страница 4: ...ith detailed programming information refer the PSoC Program mable Sytem on Chip Technical Reference Manual For up to date Ordering Packaging and Electrical Specification information refer the latest P...

Страница 5: ...a configuration sheet for a given project configuration for use during application programming in conjunction with the Device Data Sheet After the framework is generated the user can add application s...

Страница 6: ...rent part to meet the final design requirements To speed the development process the PSoC Designer Integrated Development Environment IDE provides a library of pre built pre tested hardware peripheral...

Страница 7: ...and allows you define complex breakpoint events that include monitoring address and data bus values memory locations and external signals Document Conventions Acronyms Used The following table lists...

Страница 8: ...nalog 1 IO I P0 7 Analog column mux input 2 IO IO P0 5 Analog column mux input and column output 3 IO IO P0 3 Analog column mux input and column output 4 IO I P0 1 Analog column mux input 5 Power SMP...

Страница 9: ...nection 15 IO P1 0 Crystal Output XTALout I2C Serial Data SDA 16 IO P1 2 17 IO P1 4 Optional External Clock Input EXTCLK 18 IO P1 6 19 Input XRES Active high external reset with internal pull down 20...

Страница 10: ...switched capacitor block input 20 IO I P2 2 Direct switched capacitor block input 21 IO P2 4 External Analog Ground AGND 22 IO P2 6 External Voltage Reference VRef 23 IO I P0 0 Analog column mux input...

Страница 11: ...The PSoC device has a total register address space of 512 bytes The register space is also referred to as IO space and is broken into two parts The XOI bit in the Flag register determines which bank...

Страница 12: ...RW D2 13 53 ASD20CR3 93 RW D3 14 54 ASC21CR0 94 RW D4 15 55 ASC21CR1 95 RW D5 16 56 ASC21CR2 96 RW I2C_CFG D6 RW 17 57 ASC21CR3 97 RW I2C_SCR D7 18 58 98 I2C_DR D8 RW 19 59 99 I2C_MSCR D9 1A 5A 9A INT...

Страница 13: ...must not be accessed Access is bit specific Table 9 Register Map Bank 1 Table Configuration Space Name Addr 1 Hex Access Name Addr 1 Hex Access Name Addr 1 Hex Access Name Addr 1 Hex Access PRT0DM0 00...

Страница 14: ...E9 W DCB02OU 2A RW 6A AA BDG_TR EA RW 2B 6B AB ECO_TR EB W DCB03FN 2C RW 6C AC EC DCB03IN 2D RW 6D AD ED DCB03OU 2E RW 6E AE EE 2F 6F AF EF 30 ACB00CR3 70 RW RDI0RI B0 RW F0 31 ACB00CR0 71 RW RDI0SYN...

Страница 15: ...f measure that are used in this section Table 10 Units of Measure Symbol Unit of Measure Symbol Unit of Measure C degree Celsius W micro watts dB decibels mA milli ampere fF femto farad ms milli secon...

Страница 16: ...ly Voltage on Vdd Relative to Vss 0 5 6 0 V VIO DC Input Voltage Vss 0 5 Vdd 0 5 V DC Voltage Applied to Tri state Vss 0 5 Vdd 0 5 V IMIO Maximum Current into any Port Pin 25 50 mA IMAIO Maximum Curre...

Страница 17: ...5 MHz VC2 93 75 kHz VC3 93 75 kHz ISB Sleep Mode Current with POR LVD Sleep Timer and WDT a a Standby current includes all functions POR LVD WDT Sleep Time needed for reliable system operation This m...

Страница 18: ...RPD Pull down Resistor 4 5 6 8 k VOH High Output Level Vdd 1 0 V IOH 10 mA Vdd 4 75 to 5 25V 80 mA maximum combined IOH budget VOL Low Output Level 0 75 V IOL 25 mA Vdd 4 75 to 5 25V 150 mA maximum co...

Страница 19: ...Power High Vdd 0 2 Vdd 0 2 Vdd 0 5 V V V VOLOWOA Low Output Voltage Swing worst case internal load Power Low Power Medium Power High 0 2 0 2 0 5 V V V ISOA Supply Current including associated AGND buf...

Страница 20: ...an analog output buffer The specification includes the limitationsimposedbythe characteristics of the analog output buffer GOLOA Open Loop Gain Power Low Power Medium Power High 60 60 80 dB Specifica...

Страница 21: ...Vdd 2 Power Low Power High 0 5 x Vdd 1 1 0 5 x Vdd 1 1 V V VOLOWOB Low Output Voltage Swing Load 32 ohms to Vdd 2 Power Low Power High 0 5 x Vdd 1 3 0 5 x Vdd 1 3 V V ISOB Supply Current Including Bia...

Страница 22: ...5 3 60 V Average neglecting ripple IPUMP Available Output Current VBAT 1 5V VPUMP 3 25V VBAT 1 8V VPUMP 5 0V 8 5 mA mA For implementation which includes 2 uH inductor 1 uF cap and Schottky diode VBAT5...

Страница 23: ...0 003 V AGND 2 x BandGapa CT Block Power High 2 x BG 0 048 2 x BG 0 030 2 x BG 0 024 V AGND P2 4 P2 4 Vdd 2 a CT Block Power High P2 4 0 013 P2 4 P2 4 0 014 V AGND BandGapa CT Block Power High BG 0 0...

Страница 24: ...BandGap Ref Control Power High Not Allowed RefHi 3 x BandGap Ref Control Power High Not Allowed RefHi 2 x BandGap P2 6 P2 6 0 5V Ref Control Power High Not Allowed RefHi P2 4 BandGap P2 4 Vdd 2 Ref C...

Страница 25: ...apacitor Unit Value Switch Cap 80 fF Table 23 DC POR and LVD Specifications Symbol Description Min Typ Max Units VPPOR0R VPPOR1R VPPOR2R Vdd Value for PPOR Trip positive ramp PORLEV 1 0 00b PORLEV 1 0...

Страница 26: ...P1 0 or P1 1 During Programming or Verify 1 5 mA Driving internal pull down resistor VOLV Output Low Voltage During Programming or Verify Vss 0 75 V VOHV Output High Voltage During Programming or Ver...

Страница 27: ...ets for information on maximum frequencies for user modules MHz Refer to the AC Digital Block Specifications F24M Digital PSoC Block Frequency 0 24 24 6b e d e 3 0V 5 25V MHz F32K1 Internal Low Speed...

Страница 28: ...Setting Timing Diagram Figure 14 External Crystal Oscillator Startup Timing Diagram Figure 15 24 MHz Period Jitter IMO Timing Diagram Figure 16 32 kHz Period Jitter ECO Timing Diagram 24 MHz FPLL PLL...

Страница 29: ...r design guidance only or unless otherwise specified Figure 17 GPIO Timing Diagram Table 26 AC GPIO Specifications Symbol Description Min Typ Max Units Notes FGPIO GPIO Operating Frequency 0 12 MHz TR...

Страница 30: ...r High Power High Opamp Bias High 5 9 0 92 0 72 s s s s s s Specification maximums for low power and high opamp bias medium power and medium power and high opamp bias levels are between low and high p...

Страница 31: ...n Power Low Power Low Opamp Bias High Power Medium Power Medium Opamp Bias High Power High 3 3 Volt High Bias Operation not supported Power High Opamp Bias High 3 3 Volt High Power High Opamp Bias not...

Страница 32: ...t 24 MHz 42 ns nominal period ns Maximum Frequency No Capture 49 2 MHz 4 75V Vdd 5 25V Maximum Frequency With Capture 24 6 MHz Counter Enable Pulse Width 50a ns Maximum Frequency No Enable Input 49 2...

Страница 33: ...ow Power High 0 65 0 65 V s V s SRFOB Falling Slew Rate 80 to 20 1V Step 100 pF Load Power Low Power High 0 65 0 65 V s V s BWOB Small Signal Bandwidth 20mVpp 3dB BW 100 pF Load Power Low Power High 0...

Страница 34: ...ble 33 3 3V AC External Clock Specifications Symbol Description Min Typ Max Units FOSCEXT Frequency with CPU Clock divide by 1a 0 12 12 MHz FOSCEXT Frequency with CPU Clock divide by 2 or greaterb 0 2...

Страница 35: ...of the SCL Clock 4 7 1 3 s THIGHI2C HIGH Period of the SCL Clock 4 0 0 6 s TSUSTAI2C Setup Time for a Repeated START Condition 4 7 0 6 s THDDATI2C Data Hold Time 0 0 s TSUDATI2C Data Setup Time 250 10...

Страница 36: ...36 of 43 Packaging Information This section presents the packaging specifications for the CY8C24x23 PSoC device along with the thermal impedances for each package and the typical package capacitance...

Страница 37: ...CY8C24123 CY8C24223 CY8C24423 Document Number 38 12011 Rev G Page 37 of 43 Figure 20 8 Pin 150 Mil SOIC Figure 21 20 Pin 300 Mil Molded DIP 51 85066 B 51 85066 C 51 85011 A 51 85011 A Feedback...

Страница 38: ...CY8C24123 CY8C24223 CY8C24423 Document Number 38 12011 Rev G Page 38 of 43 Figure 22 20 Pin 210 Mil SSOP Figure 23 20 Pin 300 Mil Molded SOIC 51 85077 C 51 85024 C Feedback...

Страница 39: ...CY8C24123 CY8C24223 CY8C24423 Document Number 38 12011 Rev G Page 39 of 43 Figure 24 28 Pin 300 Mil Molded DIP 51 85014 D Feedback...

Страница 40: ...CY8C24123 CY8C24223 CY8C24423 Document Number 38 12011 Rev G Page 40 of 43 Figure 25 28 Pin 210 Mil SSOP Figure 26 28 Pin 300 Mil Molded SOIC 51 85079 C 51 85026 D Feedback...

Страница 41: ...age Typical JA 8 PDIP 123 o C W 8 SOIC 185 oC W 20 PDIP 109 oC W 20 SSOP 117 o C W 20 SOIC 81 o C W 28 PDIP 69 oC W 28 SSOP 101 o C W 28 SOIC 74 oC W 32 MLF 22 o C W TJ TA POWER x JA Table 37 Typical...

Страница 42: ...C 4 6 16 8 2 Yes 20 Pin 210 Mil SSOP CY8C24223 24PVI 4 256 Yes 40 C to 85 C 4 6 16 8 2 Yes 20 Pin 210 Mil SSOP Tape and Reel CY8C24223 24PVIT 4 256 Yes 40 C to 85 C 4 6 16 8 2 Yes 20 Pin 300 Mil SOIC...

Страница 43: ...MITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to make changes without further notice to the materials described herein Cypress does...

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